5CSEBA4U19I7LN vs 5CSEBA6U19I7N Comparaison
Comparaison détaillée côte à côte de 5CSEBA4U19I7LN par Intel et 5CSEBA6U19I7N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
5CSEBA6U19I7N - Cyclone V SE SoC FPGA, 110K LE, Dual ARM Cortex-A9 800MHz | Intel
5CSEBA6U19I7N ✓ ActifComparaison des spécifications
| Paramètre | 5CSEBA4U19I7LN | 5CSEBA6U19I7N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $168,00 | $142,75 |
| Family | Cyclone V SE SoC FPGA | Cyclone V SE SoC FPGA |
| Logic Elements | 40K | 110,000 |
| Hard Processor System | Dual-core ARM Cortex-A9 MPCore with CoreSight | Dual-core ARM Cortex-A9 MPCore |
| HPS Maximum Frequency | 925 MHz | 800 MHz |
| FPGA Logic Performance | up to 925 MHz DSP / 300 MHz logic | — |
| Embedded Memory (M10K) | [DATA_NEEDED: total M10K bits] | — |
| DSP Blocks (18x18 Multipliers) | 56 | — |
| PLLs | [DATA_NEEDED: PLL count per family datasheet] | 6 (FPGA) + 3 (HPS) |
| Memory Controller | DDR2/DDR3/LPDDR2 with ECC (hardened in HPS) | — |
| HPS Peripherals | UART, SPI, I2C, USB 2.0 OTG, EMAC, SD/MMC, NAND, GPIO | — |
| Boîtier | 484-pin UFBGA (19x19 mm, 0.8 mm pitch) | 484-pin UBGAFBGA (UBGA-484, 19x19 mm) |
| Process Technology | TSMC 28 nm low-power | TSMC 28 nm low-power |
| Operating Temperature (Industrial) | -40C to +100C (I7 grade, inferred from MPN suffix) | — |
| Supply Voltage (core) | 1.1 V typical (Cyclone V family) | — |
| Statut RoHS | Compliant | Compliant |
| Configuration Scheme | Serial (EPCS) or Quad-Serial Flash | — |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Series | — | 5CSEBA6 |
| Device Variant | — | 5CSEA6 (U19 package, 110K LE) |
| Embedded Memory | — | 4.45 Mbits (M10K + MLAB) |
| Hard Memory Controller | — | DDR3, DDR3L, LPDDR2 |
| Transceivers | — | Up to 9 channels, 3.125 Gbps |
| DSP Blocks | — | 112 (18x18 multipliers) |
| User I/O Banks | — | 8 |
| Maximum User I/O | — | 288 (package-dependent) |
| Température de fonctionnement | — | -40C to +100C (Industrial) |
| Tension d'alimentation | — | Multi-rail (1.1 V core, 1.5/1.8/2.5/3.0/3.3 V I/O) |
| Configuration Modes | — | JTAG, Active Serial (AS), Passive Serial (PS), Fast Passive Parallel (FPP) |