A3PE3000L-FG896I vs A3PE3000L-FGG896M Comparaison
Comparaison détaillée côte à côte de A3PE3000L-FG896I par Microchip Technology et A3PE3000L-FGG896M par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
A3PE3000L-FG896I - ProASIC3L Flash FPGA 620 I/O | Microchip
A3PE3000L-FG896I ✓ ActifMicrochip Technology
A3PE3000L-FGG896M - 3M-Gate Low-Power Flash FPGA | Microchip
A3PE3000L-FGG896M ✓ ActifComparaison des spécifications
| Paramètre | A3PE3000L-FG896I | A3PE3000L-FGG896M |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $0,00 |
| Family | ProASIC3L (Low Power Flash FPGA) | ProASIC3L (Flash-based FPGA) |
| System Gates | 3000000 | 3,000,000 |
| Logic Cells | 75264 | 75,264 |
| User I/O | 620 | — |
| Core Voltage | 1.2 V to 1.5 V | 1.2 V to 1.5 V |
| I/O Voltage (minimum) | 1.2 V | — |
| Configuration Memory | On-chip Flash (single-chip, nonvolatile) | — |
| Low Power Feature | Flash*Freeze technology (40% dynamic / 50% static power reduction) | — |
| Boîtier | 896-BGA (FBGA-896) | 896-ball FBGA (FGG896), 1 mm pitch |
| Type de montage | Surface Mount | Surface Mount |
| Temperature Grade | Industrial (-I suffix) | — |
| Reprogrammability | Yes (in-system reprogrammable) | — |
| Statut RoHS | RoHS Non-Compliant (per distributor listing) | — |
| Lead Free Status | Contains Lead (per distributor listing) | — |
| Speed Grade | [DATA_NEEDED: speed grade / grade code] | — |
| Plage de température de fonctionnement | [DATA_NEEDED: exact operating temperature range in C] | — |
| Embedded Memory | [DATA_NEEDED: embedded SRAM block capacity] | — |
| User I/Os | — | Up to 616 (620 per DigiKey listing) |
| Embedded SRAM | — | 504 kbits true dual-port |
| Process Technology | — | 130-nm, 7-layer metal (6 copper), flash-based CMOS |
| Tension d'alimentation | — | 1.5 V |
| Logic Family | — | CMOS |
| Température de fonctionnement | — | 0 to 70 C |
| Configuration | — | Non-volatile flash, live-at-power-up Level 0, single-chip |
| Low-Power Feature | — | Flash*Freeze technology |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| Input Features | — | Schmitt trigger option on single-ended inputs; weak pull-up/pull-down |