ADC1213D105HN-C18 vs ADC1213D080HN-C18 Comparaison
Comparaison détaillée côte à côte de ADC1213D105HN-C18 par Renesas Electronics et ADC1213D080HN-C18 par Renesas Electronics. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Renesas Electronics
ADC1213D105HN-C18 - Dual 12-bit 105MSPS ADC, JESD204A | Renesas
ADC1213D105HN-C18 ✓ ActifRenesas Electronics
ADC1213D080HN-C18 - 12-bit 80MSPS Dual ADC with JESD204A | Renesas
ADC1213D080HN-C18 ✓ ActifComparaison des spécifications
| Paramètre | ADC1213D105HN-C18 | ADC1213D080HN-C18 |
|---|---|---|
| Marque | Renesas Electronics | Renesas Electronics |
| Catégorie | ADC/DAC | ADC/DAC |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $39,95 | $21,75 |
| Résolution | 12 bit | 12 bit |
| Number of Channels | 2 (dual, simultaneous sampling) | 2 (dual, simultaneous sampling) |
| Sampling Rate (per channel) | 105 MSPS | — |
| Sampling Rate (per second) | 105M | — |
| Architecture | Pipelined | Pipelined |
| Data Interface | Serial JESD204A (configurable lanes) | — |
| Input Type | Differential analog inputs | Differential / single-ended (configurable) |
| Number of Inputs | 2 | — |
| Boîtier | 56-VFQFPN exposed pad (8x8 mm) | 56-VFQFPN exposed pad (8x8 mm) |
| Type de montage | Surface Mount | Surface Mount |
| Packaging | Tape & Reel | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Plage de température de fonctionnement | [DATA_NEEDED: operating temperature range] | -40 C to +85 C (industrial) |
| Tension d'alimentation | [DATA_NEEDED: supply voltage] | — |
| Power Dissipation | [DATA_NEEDED: power dissipation] | — |
| INL (max) | [DATA_NEEDED: INL] | — |
| DNL (max) | [DATA_NEEDED: DNL] | — |
| SNR | [DATA_NEEDED: SNR] | [DATA_NEEDED: SNR dBFS at fIN] |
| SFDR | [DATA_NEEDED: SFDR] | [DATA_NEEDED: SFDR dBc] |
| Sampling Rate per Channel | — | 80 MSPS |
| Data Output Interface | — | JESD204A (serial, up to 3.125 Gbps lane) |
| Analog Supply Voltage (AVDD) | — | 1.8 V |
| Digital/Drive Supply Voltage (DRVDD) | — | 3.3 V |
| Input Bandwidth | — | [DATA_NEEDED: full-power input bandwidth MHz] |
| ENOB | — | [DATA_NEEDED: ENOB bits at fIN] |
| Power Consumption | — | [DATA_NEEDED: power mW per channel at 80 MSPS] |
| Configuration Interface | — | SPI-compatible serial |
| Niveau MSL | — | 3 (per JEDEC J-STD-020) |
| Lead-Free | — | Yes |