ADC12DL040CIVS vs ADC12DL040CIVSX Comparaison
Comparaison détaillée côte à côte de ADC12DL040CIVS par Texas Instruments et ADC12DL040CIVSX par Texas Instruments. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Texas Instruments
ADC12DL040CIVS - Dual 12-Bit 40 MSPS 3V ADC | Texas Instruments
ADC12DL040CIVS NrndTexas Instruments
ADC12DL040CIVSX - Dual 12-Bit 40 MSPS ADC | Texas Instruments
ADC12DL040CIVSX ✓ ActifComparaison des spécifications
| Paramètre | ADC12DL040CIVS | ADC12DL040CIVSX |
|---|---|---|
| Marque | Texas Instruments | Texas Instruments |
| Catégorie | ADC/DAC | ADC/DAC |
| Statut du cycle de vie | NRND | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $11,85 | $16,95 |
| Résolution | 12 Bits | 12 bit |
| Number of Channels | 2 (dual, simultaneous sampling) | 2 (Dual) |
| Sample Rate (per channel) | 40 MSPS | — |
| Architecture | Pipelined CMOS | Pipelined CMOS |
| Analog Supply Voltage | 3.0 V (2.7 V to 3.6 V range) | 3 V (single supply) |
| Digital Output Driver Supply | 2.4 V to 3.6 V (separate DVDD) | — |
| Power Dissipation (typical) | 210 mW | — |
| Power-Down Mode | Yes | — |
| SNR (fIN = 10 MHz) | 69 dB (typical) | — |
| SFDR (fIN = 10 MHz) | 85 dB (typical) | — |
| DNL (Differential Non-Linearity) | ±0.3 LSB (typical) | — |
| INL (Integral Non-Linearity) | [DATA_NEEDED: INL spec] | — |
| Internal Reference | Yes (factory-trimmed, not user-adjustable) | — |
| Sample-and-Hold | Internal, dual | Yes (integrated, per channel) |
| Duty Cycle Stabilizer | Yes | — |
| Multiplexed Output Mode | Yes (channels share single 12-bit bus) | — |
| Output Format | Straight Binary, offset binary, 2's complement (per pin strapping) | — |
| Input Clock | Single-ended or differential; 50 Ω terminated internally | — |
| Température de fonctionnement | -40 °C to +85 °C (industrial) | — |
| Boîtier | 64-pin TQFP (PAG) 10x10 mm, surface-mount | — |
| MSL (Moisture Sensitivity Level) | [DATA_NEEDED: MSL level] | — |
| Lead Finish / RoHS | Lead-free / RoHS status depends on orderable suffix (see datasheet ordering info) | — |
| Sampling Rate (per channel) | — | 40 MSPS |
| Plage de tension d'entrée | — | 0.0 V to 2.6 V (analog input) |
| Power Dissipation | — | 210 mW (typical, 3V, 40 MSPS) |
| Power Consumption per Channel | — | 105 mW (typical) |
| Data Interface | — | Parallel CMOS |
| Digital Output Format | — | [DATA_NEEDED: digital output format/code] |
| Reference Type | — | Internal (on-chip reference) |
| Plage de température de fonctionnement | — | -40C to +85C (Industrial) |
| Boîtier / Format | — | 64-TQFP (PAG) 10x10 mm |
| Type de montage | — | Surface Mount |
| Niveau MSL | — | [DATA_NEEDED: MSL level] |
| Differential Nonlinearity (DNL) | — | [DATA_NEEDED: DNL bits LSB] |
| Integral Nonlinearity (INL) | — | [DATA_NEEDED: INL bits LSB] |
| Signal-to-Noise Ratio (SNR) | — | [DATA_NEEDED: SNR dB at 40 MSPS] |
| Statut RoHS | — | Compliant |
| Lead-Free | — | Yes |