AFS600-1FG256K vs AFS600-FG256K Comparaison
Comparaison détaillée côte à côte de AFS600-1FG256K par Microchip Technology et AFS600-FG256K par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
AFS600-1FG256K - 600K Fusion Mixed-Signal FPGA | Microchip
AFS600-1FG256K ✓ ActifComparaison des spécifications
| Paramètre | AFS600-1FG256K | AFS600-FG256K |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Device Type | Fusion mixed-signal field-programmable gate array (FPGA) | Fusion mixed-signal FPGA |
| Programmable Logic | Flash-based programmable logic | Flash-based CMOS programmable logic |
| Equivalent System Gates | 600,000 gates | — |
| Logic Cells | 13,824 logic cells | 13,824 logic cells |
| User I/O | 119 I/O | — |
| Maximum Frequency | 1282.05 MHz | — |
| Core Supply Voltage | 1.5 V | — |
| Integrated Analog | Configurable analog resources | — |
| Embedded Memory | Large flash memory blocks | — |
| Clock Management | Comprehensive clock generation and management circuitry | — |
| Boîtier | 256-terminal plastic ball grid array (256-LBGA) | — |
| Terminal Count | 256 terminals | — |
| Package Shape | Square | — |
| Terminal Pitch | 1.00 mm | — |
| Package Dimensions | 17 mm x 17 mm | — |
| Type de montage | Surface mount | Surface mount |
| Ordering Package Option | Tray | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | — |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| Plage de température de fonctionnement | [DATA_NEEDED: operating temperature range] | 0°C to 70°C |
| System Gates | — | 600,000 system gates |
| Configuration Technology | — | Nonvolatile flash configuration |
| Power-Off Retention | — | Program retained when powered off |
| Power-Up Behavior | — | Live at Power-Up (LAPU) |
| Process Technology | — | 130 nm CMOS |
| Metal Layers | — | 7 metal layers |
| Logic Family | — | CMOS |
| Tension d'alimentation | — | 1.5 V |
| Package Type | — | BGA-256, 1.0 mm pitch |
| Nombre de broches | — | 256 pins |
| ARM Support | — | Optional ARM support in the Fusion family |