AFS600-1FG256K vs AFS600-FG256K Сравнение
Подробное сравнение бок о бок AFS600-1FG256K от Microchip Technology и AFS600-FG256K от Microchip Technology. Сравните ключевые характеристики, электрические параметры, упаковку, статус жизненного цикла, цены и наличие, чтобы выбрать лучший компонент для ваших требований.
Microchip Technology
AFS600-1FG256K - 600K Fusion Mixed-Signal FPGA | Microchip
AFS600-1FG256K ✓ АктивенMicrochip Technology
AFS600-FG256K - 600K-Gate Mixed-Signal FPGA | Microchip
AFS600-FG256K ✓ АктивенСравнение характеристик
| Параметр | AFS600-1FG256K | AFS600-FG256K |
|---|---|---|
| Бренд | Microchip Technology | Microchip Technology |
| Категория | FPGA & CPLD | FPGA & CPLD |
| Статус жизненного цикла | Активен | Активен |
| Device Type | Fusion mixed-signal field-programmable gate array (FPGA) | Fusion mixed-signal FPGA |
| Programmable Logic | Flash-based programmable logic | Flash-based CMOS programmable logic |
| Equivalent System Gates | 600,000 gates | — |
| Logic Cells | 13,824 logic cells | 13,824 logic cells |
| User I/O | 119 I/O | — |
| Maximum Frequency | 1282.05 MHz | — |
| Core Supply Voltage | 1.5 V | — |
| Integrated Analog | Configurable analog resources | — |
| Embedded Memory | Large flash memory blocks | — |
| Clock Management | Comprehensive clock generation and management circuitry | — |
| Корпус | 256-terminal plastic ball grid array (256-LBGA) | — |
| Terminal Count | 256 terminals | — |
| Package Shape | Square | — |
| Terminal Pitch | 1.00 mm | — |
| Package Dimensions | 17 mm x 17 mm | — |
| Тип монтажа | Surface mount | Surface mount |
| Ordering Package Option | Tray | — |
| Статус RoHS | [DATA_NEEDED: RoHS status] | — |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| Диапазон рабочих температур | [DATA_NEEDED: operating temperature range] | 0°C to 70°C |
| System Gates | — | 600,000 system gates |
| Configuration Technology | — | Nonvolatile flash configuration |
| Power-Off Retention | — | Program retained when powered off |
| Power-Up Behavior | — | Live at Power-Up (LAPU) |
| Process Technology | — | 130 nm CMOS |
| Metal Layers | — | 7 metal layers |
| Logic Family | — | CMOS |
| Напряжение питания | — | 1.5 V |
| Package Type | — | BGA-256, 1.0 mm pitch |
| Число выводов | — | 256 pins |
| ARM Support | — | Optional ARM support in the Fusion family |