CDK8307AILP64 vs CDK8307CILP64 Comparaison
Comparaison détaillée côte à côte de CDK8307AILP64 par MaxLinear et CDK8307CILP64 par MaxLinear. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
MaxLinear
CDK8307AILP64 - 12/13-bit Octal Ultra-Low Power LVDS ADC | MaxLinear
CDK8307AILP64 ✓ Actif
Comparaison des spécifications
| Paramètre | CDK8307AILP64 | CDK8307CILP64 |
|---|---|---|
| Marque | MaxLinear | MaxLinear |
| Catégorie | ADC/DAC | ADC/DAC |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $18,45 | $11,95 |
| Résolution | 12/13-bit (selectable) | 12/13-bit (selectable) |
| Number of Channels | 8 (simultaneous sampling) | 8 (simultaneous sampling) |
| Sample Rate Range | 20 / 40 / 50 / 65 / 80 MSPS | — |
| Architecture | Pipelined ADC with proprietary core | Proprietary pipeline ADC |
| Output Interface | Serial LVDS | — |
| Reference | Internal reference (integrated) | Internal (integrated bandgap) |
| Tension d'alimentation | [DATA_NEEDED: supply voltage] | — |
| Power Dissipation (Typ) | Ultra-low power (per-channel shutdown) | — |
| Shutdown Modes | Per-channel + full-chip idle (via external pin) | — |
| Control Interface | Serial programming interface (SPI-style) | SPI-compatible serial |
| FPGA Compatibility | Designed to interface with major FPGA vendors | — |
| Boîtier | 64-pin QFN (ILP64) | 64-pin LQFP (LP64) |
| Type de montage | Surface Mount | Surface Mount |
| Plage de température de fonctionnement | [DATA_NEEDED: temperature range] | [DATA_NEEDED: operating temperature range] |
| Statut RoHS | Compliant | Compliant (per MaxLinear product page) |
| Original Brand | Cadeka / Exar (now MaxLinear) | — |
| Sample Rate | — | 65 MSPS maximum (20/40/50/65 MSPS grades) |
| Digital Output Interface | — | Serial LVDS |
| Input Type | — | Differential analog inputs |
| Power Profile | — | Ultra-low power (per-channel) |
| Supply Voltage (AVDD) | — | [DATA_NEEDED: AVDD nominal] |
| Supply Voltage (DRVDD/LVDS) | — | [DATA_NEEDED: DRVDD nominal] |
| ENOB | — | [DATA_NEEDED: effective number of bits] |
| SNR | — | [DATA_NEEDED: signal-to-noise ratio] |
| SFDR | — | [DATA_NEEDED: spurious-free dynamic range] |