CDK8307AILP64 vs CDK8307CILP64 对比

详细并排对比 CDK8307AILP64 出自 MaxLinear 和 CDK8307CILP64 出自 MaxLinear。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 CDK8307AILP64 CDK8307CILP64
品牌 MaxLinear MaxLinear
分类 ADC/DAC ADC/DAC
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $18.45 $11.95
分辨率 12/13-bit (selectable) 12/13-bit (selectable)
Number of Channels 8 (simultaneous sampling) 8 (simultaneous sampling)
Sample Rate Range 20 / 40 / 50 / 65 / 80 MSPS —
Architecture Pipelined ADC with proprietary core Proprietary pipeline ADC
Output Interface Serial LVDS —
Reference Internal reference (integrated) Internal (integrated bandgap)
电源电压 [DATA_NEEDED: supply voltage] —
Power Dissipation (Typ) Ultra-low power (per-channel shutdown) —
Shutdown Modes Per-channel + full-chip idle (via external pin) —
Control Interface Serial programming interface (SPI-style) SPI-compatible serial
FPGA Compatibility Designed to interface with major FPGA vendors —
封装 64-pin QFN (ILP64) 64-pin LQFP (LP64)
安装类型 Surface Mount Surface Mount
工作温度范围 [DATA_NEEDED: temperature range] [DATA_NEEDED: operating temperature range]
RoHS 状态 Compliant Compliant (per MaxLinear product page)
Original Brand Cadeka / Exar (now MaxLinear) —
Sample Rate — 65 MSPS maximum (20/40/50/65 MSPS grades)
Digital Output Interface — Serial LVDS
Input Type — Differential analog inputs
Power Profile — Ultra-low power (per-channel)
Supply Voltage (AVDD) — [DATA_NEEDED: AVDD nominal]
Supply Voltage (DRVDD/LVDS) — [DATA_NEEDED: DRVDD nominal]
ENOB — [DATA_NEEDED: effective number of bits]
SNR — [DATA_NEEDED: signal-to-noise ratio]
SFDR — [DATA_NEEDED: spurious-free dynamic range]

数据手册与资源

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