EP1810JM-45 vs EP1810JI-45 Comparaison
Comparaison détaillée côte à côte de EP1810JM-45 par Altera et EP1810JI-45 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1810JM-45 | EP1810JI-45 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $14,20 | $9,75 |
| Device Family | Classic EPLD (EP1810 series) | — |
| Macrocells | 48 | — |
| Usable Gates | ~900 gates | — |
| Propagation Delay (tpd) | 45 ns (max, -45 speed grade) | — |
| Supply Voltage (VCC) | 4.5 V to 5.5 V | — |
| Technology | CMOS, UV-EPROM configuration | CMOS EPROM |
| Package Type | JLCC-68 (ceramic J-leaded chip carrier) | 68-pin JLCC (J-leaded ceramic chip carrier) |
| Package Code | JM (windowed ceramic, UV-erasable) | QCCJ |
| Nombre de broches | 68 | — |
| Température de fonctionnement | -55 C to +125 C (military grade) | -40 °C to +85 °C |
| I/O Compatibility | CMOS / TTL | — |
| Configuration Method | JEDEC fuse map, EPROM programmer | — |
| Programming Technology | UV-erasable EPROM (non-volatile, instant-on) | — |
| Type de montage | Surface Mount (J-lead) | — |
| Logic Type | EPLD / PLD (programmable logic device) | — |
| Statut RoHS | [DATA_NEEDED: RoHS status - legacy mil-spec part] | — |
| Niveau MSL | [DATA_NEEDED: MSL level] | — |
| Manufacturer | — | Altera (now Intel FPGA) |
| Series | — | Classic EPLD Family |
| Device Type | — | UV-Erasable / OTP Complex PLD |
| Macrocell Count | — | 48 |
| Maximum Operating Frequency | — | 33.3 MHz |
| Propagation Delay (tPD) | — | 50 ns |
| Configurable I/O Lines | — | 48 |
| Dedicated Inputs | — | 12 |
| Terminal Form | — | J BEND |
| Package Shape | — | SQUARE |
| Number of Terminals | — | 68 |
| Temperature Grade | — | INDUSTRIAL |
| Tension d'alimentation | — | 5 V (TTL compatible) |
| Programming Method | — | UV-erase (windowed) / OTP via JEDEC |