EP1K10TC100-3N vs EP1K10TC100-2 Comparaison
Comparaison détaillée côte à côte de EP1K10TC100-3N par Intel et EP1K10TC100-2 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP1K10TC100-3N - 10K-Gate ACEX-1K FPGA, 576 Cells, 66 I/O, 100-TQFP | Intel / Altera
EP1K10TC100-3N ObsoleteComparaison des spécifications
| Paramètre | EP1K10TC100-3N | EP1K10TC100-2 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $19,95 | $9,85 |
| Series | ACEX-1K | — |
| Family | ACEX 1K | ACEX-1K |
| Manufacturer | Intel (formerly Altera) | — |
| Typical Gate Count | 10,000 gates | — |
| Logic Elements (Cells) | 576 | — |
| Embedded Memory (EAB) | 12,288 bits | — |
| Number of LABs | 72 | — |
| User I/O Count | 66 | — |
| Operating Voltage (Core) | 2.5 V | — |
| Process Technology | 0.22 µm CMOS | 0.22 μm CMOS |
| Maximum Internal Clock Frequency | 200 MHz | — |
| Speed Grade | -3 (commercial) | — |
| Boîtier | 100-pin TQFP | 100-pin TQFP (TQFP-100) |
| JTAG Support | Yes (IEEE 1149.1-1990) | — |
| PCI Compliance | PCI Local Bus Specification Revision 2.2 (5.0 V) | — |
| Configuration | JTAG / serial configuration device | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | 0 °C to 70 °C (TA, commercial) |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | Compliant (per Heisener / DigiKey listings) |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Logic Elements / Cells | — | 576 |
| Number of Logic Array Blocks (LABs/CLBs) | — | 72 |
| Total RAM Bits | — | 12288 |
| Number of Gates | — | 10000 (typical); 56000 (maximum) |
| Number of User I/O | — | 66 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Pin-to-Pin Logic Delay | — | 0.5 ns |
| Maximum Internal Frequency | — | 200 MHz (per FPGAkey listing) |
| Core Supply Voltage (VCCINT) | — | 2.375 V to 2.625 V (2.5 V nominal) |
| I/O Supply Voltage (VCCIO) | — | [DATA_NEEDED: VCCIO range] |
| Type de montage | — | Surface Mount |
| Configuration Method | — | SRAM, serial / JTAG (IEEE 1149.1) |
| Lead-Free | — | Yes |