EP1K50TI144-2 vs EP1K50TI144-2Q Comparaison
Comparaison détaillée côte à côte de EP1K50TI144-2 par Intel et EP1K50TI144-2Q par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1K50TI144-2 | EP1K50TI144-2Q |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $27,85 | $19,85 |
| Family | ACEX-1K | ACEX-1K |
| Logic Elements (LEs) | 2,880 | — |
| Typical Gates | 50,000 | — |
| Maximum User I/O | 102 | — |
| Logic Array Blocks (LABs) | 360 | — |
| Embedded Array Blocks (EABs) | [DATA_NEEDED: EAB count] | — |
| Total RAM Bits | 40,960 | — |
| Core Supply Voltage (VCCINT) | 2.5 V (2.375 V to 2.625 V) | — |
| I/O Supply Voltage (VCCIO) | [DATA_NEEDED: VCCIO range] | — |
| Speed Grade | -2 | -2 |
| Température de fonctionnement | -40 °C to +85 °C (Industrial) | — |
| Boîtier | 144-LQFP (TQFP-144) | 144-pin TQFP (TQFP-144) |
| Type de montage | Surface Mount | Surface Mount |
| Process Technology | SRAM-based, 0.18 µm | 0.22 um CMOS |
| Configuration Method | Passive Serial / Passive Parallel / JTAG | — |
| JTAG Support | IEEE 1149.1 Boundary Scan | — |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Device Logic Elements | — | 2880 |
| Typical Gate Count | — | 50000 |
| Embedded Memory Bits (EAB) | — | 40960 |
| Number of User I/O | — | 102 |
| Number of Logic Array Blocks (LABs) | — | [DATA_NEEDED: LAB count] |
| Number of Embedded Array Blocks (EABs) | — | [DATA_NEEDED: EAB count] |
| Core Voltage (VCCINT) | — | 2.5 V |
| I/O Bank Voltage (VCCIO) | — | 2.5 V / 3.3 V compatible per bank |
| Operating Temperature Grade | — | Industrial (-40C to +100C) |
| Configuration Scheme | — | SRAM, serial or parallel, JTAG (IEEE 1149.1) |