EP1S25F1020I6 vs EP1S25F1020C6N Comparaison
Comparaison détaillée côte à côte de EP1S25F1020I6 par Altera et EP1S25F1020C6N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1S25F1020I6 | EP1S25F1020C6N |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1 530,00 | $450,00 |
| Family | Stratix | Stratix |
| Series | Stratix I | — |
| Logic Elements (LEs) | 25,660 | — |
| Logic Array Blocks (LABs) | 2,566 | — |
| Embedded Memory (RAM bits) | 1,944,576 bits (≈ 1.85 Mbits) | — |
| Maximum User I/O | 706 | — |
| Maximum Operating Frequency | 450 MHz (per datasheet reference) | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage | 1.5 V | — |
| Boîtier | 1020-ball FC-FBGA (33 x 33 mm, 1 mm pitch) | 1020-ball FC-FBGA (33 x 33 mm, 1.0 mm pitch) |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Température de fonctionnement | -40 °C to +85 °C (industrial) | 0C to +85C (Commercial) |
| Configuration | Passive serial, fast passive parallel, JTAG, enhanced configuration device | — |
| On-chip PLL | Yes | — |
| DSP Blocks | Yes (Stratix DSP blocks) | — |
| Statut RoHS | [DATA_NEEDED: rohs compliance per lot] | [DATA_NEEDED: RoHS status] |
| Logic Elements (LE) | — | 25,660 |
| Logic Cells | — | 25,660 |
| Embedded Memory (bits) | — | 1,944,576 |
| User I/O Pins | — | 706 |
| LABs (Logic Array Blocks) | — | 2,566 |
| Core Supply Voltage (VCCINT) | — | 1.5 V |
| Maximum Internal Clock Frequency | — | 450.05 MHz |
| Configuration Method | — | JTAG or EPC configuration device |
| Family Generation | — | Stratix (1st generation) |