EP1S25F1020I6 vs EP1S25F1020C6N Vergleich
Detaillierter Direktvergleich von EP1S25F1020I6 von Altera und EP1S25F1020C6N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1S25F1020I6 | EP1S25F1020C6N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.530,00 | $450,00 |
| Family | Stratix | Stratix |
| Series | Stratix I | — |
| Logic Elements (LEs) | 25,660 | — |
| Logic Array Blocks (LABs) | 2,566 | — |
| Embedded Memory (RAM bits) | 1,944,576 bits (≈ 1.85 Mbits) | — |
| Maximum User I/O | 706 | — |
| Maximum Operating Frequency | 450 MHz (per datasheet reference) | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage | 1.5 V | — |
| Gehäuse | 1020-ball FC-FBGA (33 x 33 mm, 1 mm pitch) | 1020-ball FC-FBGA (33 x 33 mm, 1.0 mm pitch) |
| Montageart | Surface Mount (BGA) | Surface Mount |
| Betriebstemperatur | -40 °C to +85 °C (industrial) | 0C to +85C (Commercial) |
| Configuration | Passive serial, fast passive parallel, JTAG, enhanced configuration device | — |
| On-chip PLL | Yes | — |
| DSP Blocks | Yes (Stratix DSP blocks) | — |
| RoHS-Status | [DATA_NEEDED: rohs compliance per lot] | [DATA_NEEDED: RoHS status] |
| Logic Elements (LE) | — | 25,660 |
| Logic Cells | — | 25,660 |
| Embedded Memory (bits) | — | 1,944,576 |
| User I/O Pins | — | 706 |
| LABs (Logic Array Blocks) | — | 2,566 |
| Core Supply Voltage (VCCINT) | — | 1.5 V |
| Maximum Internal Clock Frequency | — | 450.05 MHz |
| Configuration Method | — | JTAG or EPC configuration device |
| Family Generation | — | Stratix (1st generation) |