EP1SGX25DF800C6N vs EP1SGX25DF800C5N Comparaison
Comparaison détaillée côte à côte de EP1SGX25DF800C6N par Intel et EP1SGX25DF800C5N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP1SGX25DF800C6N - Stratix GX FPGA, 25K LE, 3.1875 Gbps SERDES | Intel / Altera
EP1SGX25DF800C6N Obsolete
Comparaison des spécifications
| Paramètre | EP1SGX25DF800C6N | EP1SGX25DF800C5N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $118,00 | $158,00 |
| Family | Stratix GX | Stratix GX |
| Logic Elements | 25,560 LEs | — |
| Maximum Transceiver Channels | 20 channels | — |
| Maximum Transceiver Data Rate | 3.1875 Gbps | 3.1875 Gbps per channel |
| Boîtier | FBGA-780 (FineLine BGA, 800-ball per JEDEC ordering code) | FBGA-800 (FineLine BGA, 31x31 mm) |
| Process Node | [DATA_NEEDED: process node] | — |
| Core Voltage | 1.5 V | — |
| Température de fonctionnement | Commercial (0 C to +85 C) | 0C to +85C (commercial) |
| Speed Grade | 6 | C5 (commercial) |
| Configuration Method | Passive Serial / Passive Parallel / Active Serial / JTAG | — |
| Transceiver Encoding | 8B/10B | — |
| Clock Data Recovery (CDR) | Yes, integrated per channel | — |
| Type de mémoire | TriMatrix embedded SRAM | — |
| DSP Blocks | Yes, embedded multiplier blocks | Embedded multiplier blocks (family-wide) |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Statut RoHS | [DATA_NEEDED: RoHS status] | — |
| Lead Free | [DATA_NEEDED: lead free status] | — |
| Device Logic Elements | — | 25,660 (typical) |
| Transceiver Channels | — | 8 (full-duplex) |
| Process Technology | — | 130 nm |
| Supply Voltage (Core) | — | 1.5 V typical |
| Lead-Free / RoHS Status | — | Lead-free (N suffix) |
| On-Chip Memory (TriMatrix) | — | Approx. 2 Mbits total |
| PLLs | — | Up to 40 (device-wide) |
| Embedded 8b/10b Encoder/Decoder | — | Yes (one per transceiver channel) |
| PCI Express Hard IP | — | x1, x4 endpoints supported |
| Niveau MSL | — | [DATA_NEEDED: MSL Level] |
| Development Software | — | Quartus II (legacy) |