EP1SGX25DF800I6N vs EP1SGX25CF672I6 Comparaison
Comparaison détaillée côte à côte de EP1SGX25DF800I6N par Intel et EP1SGX25CF672I6 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP1SGX25DF800I6N - Stratix GX FPGA, 25K LE, 20x 3.1875 Gbps Transceivers | Intel / Altera
EP1SGX25DF800I6N ⚠ Dernier achat
Comparaison des spécifications
| Paramètre | EP1SGX25DF800I6N | EP1SGX25CF672I6 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1 450,00 | $171,00 |
| Family | Stratix GX | Stratix GX |
| Logic Elements | [DATA_NEEDED: logic element count] | 25,660 |
| Transceiver Channels | 4 to 20 channels | — |
| Maximum Transceiver Data Rate | 3.1875 Gbps per channel | — |
| CDR / SERDES | Embedded clock-data recovery and SERDES | — |
| Memory | TriMatrix memory, up to 2 Mbits | — |
| DSP Blocks | Up to 22 DSP blocks | [DATA_NEEDED: DSP block count per Stratix GX device data sheet] |
| Hard IP | PCI Express PHY, external memory interfaces (DDR, DDR-II, QDR-II, RLDRAM-II) | — |
| Source-Synchronous Channels | 8 channels | — |
| I/O Standards | LVDS, LVTTL, LVCMOS, SSTL, HSTL | — |
| Boîtier | 800-pin FineLine BGA (DF800) | 672-ball FBGA (27 x 27 mm, 1 mm pitch) |
| Speed Grade | -6 (production grade) | — |
| Temperature Range | Industrial -40C to +100C | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | Compliant (lead-free FBGA) |
| Protocol Support | Gigabit Ethernet, SONET/SDH, PCI Express, custom serial | — |
| Logic Array Blocks (LABs) | — | 2,566 |
| Total RAM Bits | — | 1,944,576 |
| User I/O Pins | — | 455 |
| Core Supply Voltage | — | 1.425 V to 1.575 V (1.5 V typical) |
| Process Technology | — | 130 nm CMOS |
| Internal Clock Performance | — | Up to 5000 MHz |
| Type de montage | — | Surface Mount |
| Température de jonction en fonctionnement | — | -40C to +100C |
| Transceiver Count | — | [DATA_NEEDED: precise number of SERDES channels per pin list] |
| Lead-Free | — | Yes |