EP20K100FC144-1X vs EP20K100EFC144-1 Comparaison
Comparaison détaillée côte à côte de EP20K100FC144-1X par Intel et EP20K100EFC144-1 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K100FC144-1X | EP20K100EFC144-1 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $30,50 | $61,75 |
| Series | APEX-20K | — |
| Number of Logic Elements (LEs) | 4,160 | — |
| Logic Array Blocks (LABs) | 416 | — |
| Embedded RAM Bits | 53,248 | — |
| Number of User I/O | 93 | — |
| Number of Gates | 100,000 (typical system gates) | — |
| Boîtier | 144-pin TQFP (FC) | — |
| Type de montage | Surface Mount | Surface Mount |
| Speed Grade | -1 (standard) | — |
| Temperature Grade | Commercial (0 °C to +85 °C) | — |
| Process Technology | 0.18 µm CMOS, SRAM-based configuration | 0.15-µm all-layer copper |
| Core Voltage | [DATA_NEEDED: VCCINT] | — |
| I/O Voltage | [DATA_NEEDED: VCCIO range] | — |
| Configuration Mode | Passive Serial / Passive Parallel / Boundary Scan | — |
| Statut RoHS | Not RoHS compliant (legacy commercial TQFP) | [DATA_NEEDED: RoHS compliance] |
| Lifecycle | Obsolete — discontinued by Intel/Altera | — |
| Device Family | — | APEX 20KE |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Typical Gates | — | 100,000 |
| Maximum System Gates | — | 263,000 |
| Logic Elements | — | 4,160 |
| Embedded System Blocks (ESBs) | — | Yes (memory + dedicated logic) |
| User I/Os | — | 93 |
| Propagation Delay | — | 1.6 ns |
| PLLs | — | 4 |
| Package Type | — | 144-ball FBGA (13x13 mm, 1.0 mm pitch) |
| Core Voltage (VCCINT) | — | 1.71 V to 1.89 V |
| I/O Voltage Support | — | 1.8 V / 2.5 V / 3.3 V (multiVolt I/O) |
| Température de fonctionnement | — | 0 °C to 85 °C (commercial) |
| Configuration Method | — | SRAM (volatile) - external boot PROM required |
| Boundary-Scan Support | — | IEEE 1149.1 (JTAG) |