EP20K400GC655-2 vs EP20K400GC655-3V Comparaison
Comparaison détaillée côte à côte de EP20K400GC655-2 par Altera et EP20K400GC655-3V par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K400GC655-2 | EP20K400GC655-3V |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $80,00 | $160,00 |
| Series | APEX-20KC | APEX-20KC |
| Family | APEX 20K | APEX 20KC (Apex 20KE Device Family, 1.8 V, LVDS) |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| System Gates | 400,000 | — |
| Logic Cells / Elements | 16,640 | — |
| Total RAM Bits | 212,992 | 212992 |
| Maximum Internal Frequency | 200 MHz | — |
| Speed Grade | -2 | -3V (commercial temperature, Vcc 1.8 V) |
| Process Technology | 0.22 µm CMOS | CMOS |
| Core Supply Voltage | 2.5 V | 1.71 V to 1.89 V (1.8 V nominal) |
| I/O Supply Voltage | 1.71 V to 1.89 V (MultiVolt) | — |
| LVDS Support | Yes | — |
| PLLs | 4 | — |
| Nombre de broches | 655 | — |
| Package Type | 655-BCPGA (CPGA-655) | — |
| Package Dimensions | 62.48 x 62.48 mm | — |
| Type de montage | Through-Hole (CPGA) | Through Hole (CPGA) |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: commercial / industrial / military grade] |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance flag - BCPGA package often non-RoHS] |
| Manufacturer | — | Altera (now Intel) |
| Logic Elements | — | 16640 |
| Typical Gate Count | — | 400000 |
| Number of User I/O | — | 496 |
| Fréquence d'horloge maximale | — | 714.2 MHz |
| Propagation Delay | — | 3.6 ns |
| Boîtier | — | 655-BCPGA (62.48 mm x 62.48 mm) |
| Package Equivalence Code | — | SPGA655, 47x47 |
| Peak Reflow Temperature | — | 220 C |
| Configuration | — | SRAM-based (requires EPC configuration device) |
| JTAG Support | — | Yes (IEEE 1149.1 boundary-scan) |