EP2A25F672C7 vs EP2A25F672I-9 Comparaison
Comparaison détaillée côte à côte de EP2A25F672C7 par Altera et EP2A25F672I-9 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2A25F672C7 | EP2A25F672I-9 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $118,00 | $195,00 |
| Product Family | APEX II | — |
| Logic Elements | 25,000 | — |
| Maximum System Gates | 1,650,000 | [DATA_NEEDED: maximum system gates] |
| Maximum RAM Bits | 422,976 | — |
| User I/O Count | 492 | — |
| Boîtier | 672-ball FCBGA (FineLine BGA) | 672-pin FCBGA (FineLine BGA) |
| Process Technology | 0.15-um all-layer copper, up to 8 metal layers | 0.18 µm CMOS |
| Supply Voltage (Core) | 1.5 V | — |
| LVDS Data Rate | 1 Gbps per channel (True-LVDS) | — |
| I/O Standards Supported | LVDS, LVPECL, PCML, HyperTransport | — |
| Température de fonctionnement | 0C to +85C (Commercial) | — |
| Speed Grade | -7 | -9 |
| Configuration Mode | Passive Serial, Passive Parallel, JTAG | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Embedded System Blocks (ESB) | Yes - RAM, ROM, CAM, multiplier support | — |
| Family | — | APEX II |
| Logic Elements (typical) | — | 25,000 |
| Embedded System Blocks (ESB) Memory | — | 1,125 Kbits |
| Maximum User I/O Pins | — | [DATA_NEEDED: maximum user I/O pins] |
| Number of PLLs | — | 4 |
| Core Voltage | — | 1.5 V / 1.8 V (speed-grade dependent) |
| Operating Temperature Grade | — | Industrial (-40 °C to +100 °C junction) |
| Type de montage | — | Surface Mount (BGA) |
| Niveau de sensibilité à l'humidité (MSL) | — | 3 (per Vyrian listing) |
| Peak Reflow Temperature | — | 220 °C (per Vyrian listing) |
| Configuration Method | — | JTAG / serial configuration EPROM |
| Supported I/O Standards | — | LVTTL, LVCMOS, LVDS, PCI |
| Legacy Status | — | Obsolete - consult Altera / Intel FPGA archive for documentation |