EP2A25F672I6 vs EP2A25F672I9 Comparaison
Comparaison détaillée côte à côte de EP2A25F672I6 par Intel et EP2A25F672I9 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2A25F672I6 | EP2A25F672I9 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $178,00 | $135,00 |
| Family | APEX II | APEX II |
| Logic Elements (typical gates) | 25,000 | — |
| Fabric Architecture | SRAM-based LUT | — |
| Process Technology | 0.18 µm CMOS | 0.15 µm CMOS |
| Boîtier | 672-ball FineLine BGA (FBGA-672) | 672-pin FC-FBGA |
| Core Voltage | 1.5 V | — |
| Configuration Method | External SRAM configuration device (EPC series) | — |
| Temperature Grade | Industrial (-40 °C to +100 °C ambient) | Industrial (-40 °C to +100 °C) |
| Speed Grade | 6 | 9 (fastest APEX II grade) |
| Embedded Memory | Embedded System Blocks (ESB), dual-port RAM / CAM | — |
| DSP Blocks | MultiCore dedicated multipliers | — |
| Boundary Scan | JTAG (IEEE 1149.1) compliant | — |
| Clock Management | Dedicated PLL / clock tree circuitry | — |
| I/O Bank Count | [DATA_NEEDED: number of user I/O banks] | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | Unknown (legacy 2000s part; verify lot certificate) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Niveau MSL | [DATA_NEEDED: moisture sensitivity level] | — |
| Type de montage | Surface Mount (BGA) | Surface Mount (flip-chip BGA) |
| Manufacturer | — | Intel (formerly Altera) |
| Logic Elements (LEs) | — | 24,320 |
| System Gates (typical) | — | 900,000 |
| Maximum Operating Frequency | — | 236 MHz |
| Core Voltage (VCCINT) | — | 1.5 V |
| Nombre de broches | — | 672 |
| Embedded System Blocks (ESBs) | — | Yes (dual-port RAM/ROM) |
| Maximum User I/O | — | [DATA_NEEDED: max user I/O pin count] |
| Maximum Memory Bits | — | 422,400 bits |
| PLLs | — | 4 |
| Peak Reflow Temperature | — | 220 °C (per distributor listing) |
| Niveau de sensibilité à l'humidité (MSL) | — | 3 |