EP2A40F672C7 vs EP2A40F672C6N Comparaison
Comparaison détaillée côte à côte de EP2A40F672C7 par Intel et EP2A40F672C6N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2A40F672C7 | EP2A40F672C6N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $195,00 | $165,00 |
| Family | APEX II | APEX II |
| Logic Elements | 38,400 | 40,000 |
| System Gates | 1,500,000 | — |
| Macro Cells | 2,560 | — |
| Maximum User I/O | 492 | — |
| Process Technology | 0.15 µm CMOS, all-layer copper, up to 8 metal layers | SRAM-based, 0.18 um (per family datasheet) |
| Core Voltage | 1.5 V | 1.5 V |
| I/O Voltage Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Pin-to-Pin Delay | 1.55 ns (C7 speed grade) | — |
| Maximum Internal Frequency | 562 MHz | — |
| High-Speed Interface | 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport | — |
| PLLs | 4 | — |
| Boîtier | 672-ball FC-FBGA (FineLine BGA) | 672-ball FineLine BGA |
| Package Dimensions | 27 x 27 mm, 1.0 mm pitch | — |
| Type de montage | Surface Mount | Surface Mount |
| Operating Temperature Grade | Commercial (per 'C' suffix in speed grade) | — |
| Statut RoHS | Compliant | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | Yes | — |
| Maximum System Gates | — | 1,125,000 |
| Embedded RAM Bits | — | 442,368 |
| Embedded System Blocks (ESBs) | — | 160 |
| Maximum User I/O Pins | — | [DATA_NEEDED: maximum user I/O count] |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, GTL+, SSTL, HSTL, 1.8V/2.5V/3.3V/5V |
| Température de fonctionnement | — | Commercial (0C to +85C) |
| Speed Grade | — | C6 (per part number suffix) |
| Configuration Methods | — | Passive Serial, Passive Parallel, JTAG |
| PLL Count | — | [DATA_NEEDED: PLL count] |