EP2A40F672C7 vs EP2A40F672C6N Comparación
Comparación detallada lado a lado de EP2A40F672C7 por Intel y EP2A40F672C6N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP2A40F672C7 | EP2A40F672C6N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $195,00 | $165,00 |
| Family | APEX II | APEX II |
| Logic Elements | 38,400 | 40,000 |
| System Gates | 1,500,000 | — |
| Macro Cells | 2,560 | — |
| Maximum User I/O | 492 | — |
| Process Technology | 0.15 µm CMOS, all-layer copper, up to 8 metal layers | SRAM-based, 0.18 um (per family datasheet) |
| Core Voltage | 1.5 V | 1.5 V |
| I/O Voltage Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Pin-to-Pin Delay | 1.55 ns (C7 speed grade) | — |
| Maximum Internal Frequency | 562 MHz | — |
| High-Speed Interface | 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport | — |
| PLLs | 4 | — |
| Encapsulado | 672-ball FC-FBGA (FineLine BGA) | 672-ball FineLine BGA |
| Package Dimensions | 27 x 27 mm, 1.0 mm pitch | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Operating Temperature Grade | Commercial (per 'C' suffix in speed grade) | — |
| Estado RoHS | Compliant | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | Yes | — |
| Maximum System Gates | — | 1,125,000 |
| Embedded RAM Bits | — | 442,368 |
| Embedded System Blocks (ESBs) | — | 160 |
| Maximum User I/O Pins | — | [DATA_NEEDED: maximum user I/O count] |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, GTL+, SSTL, HSTL, 1.8V/2.5V/3.3V/5V |
| Temperatura de funcionamiento | — | Commercial (0C to +85C) |
| Speed Grade | — | C6 (per part number suffix) |
| Configuration Methods | — | Passive Serial, Passive Parallel, JTAG |
| PLL Count | — | [DATA_NEEDED: PLL count] |