EP2A70B652C7 vs EP20K600CB652I8 Comparaison
Comparaison détaillée côte à côte de EP2A70B652C7 par Intel et EP20K600CB652I8 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2A70B652C7 | EP20K600CB652I8 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $10,51 | $92,00 |
| Manufacturer | Intel (formerly Altera) | — |
| Series | APEX II | EP20K600 |
| Family | APEX II (Field-Programmable Gate Array) | APEX 20KC |
| Logic Elements (LEs) | 67200 | — |
| Typical Gates | 1140000 | — |
| Maximum User I/Os | 336 | — |
| Package Type | BGA-652 (FineLine BGA) | — |
| Package Size | 27 mm x 27 mm (approximate) | — |
| Type de montage | Surface Mount | Surface Mount |
| Operating Temperature Grade | Commercial (C) | — |
| Speed Grade | 7 | — |
| Core Voltage | 1.8 V | — |
| I/O Bank Voltage (VCCIO) | 1.5V / 1.8V / 2.5V / 3.3V (bank-dependent) | — |
| Configuration Interface | JTAG, Passive Serial | — |
| Type de mémoire | Embedded SRAM blocks (ESBs) | — |
| PLL / Clock Management | Yes, dedicated PLL blocks | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| System Gates | — | 600,000 |
| Logic Elements / Cells | — | 24,320 |
| Maximum Operating Frequency | — | 301.21 MHz |
| Propagation Delay (tpd) | — | 1.78 ns (CMOS) |
| Process Technology | — | 0.15 µm CMOS |
| Core Supply Voltage (VCCINT) | — | 1.8 V nominal (1.71 V to 1.89 V) |
| Température de fonctionnement | — | -40 °C to +85 °C (Industrial) |
| Boîtier | — | 652-ball FineLine BGA (S-PBGA-B652) |
| Package Code | — | BGA, square |
| Ball Pitch | — | 1.27 mm |
| Package Body Size | — | 45 mm × 45 mm |
| User I/O Lines | — | 488 |
| Dedicated Clock Inputs | — | 4 |
| Programming Interface | — | IEEE 1149.1 JTAG (in-system) |