EP2A70B652C7 vs EP20K600CB652I8 比較
詳細な並列比較: EP2A70B652C7 メーカー: Intel および EP20K600CB652I8 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2A70B652C7 | EP20K600CB652I8 |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $10.51 | $92.00 |
| Manufacturer | Intel (formerly Altera) | — |
| Series | APEX II | EP20K600 |
| Family | APEX II (Field-Programmable Gate Array) | APEX 20KC |
| Logic Elements (LEs) | 67200 | — |
| Typical Gates | 1140000 | — |
| Maximum User I/Os | 336 | — |
| Package Type | BGA-652 (FineLine BGA) | — |
| Package Size | 27 mm x 27 mm (approximate) | — |
| 実装タイプ | Surface Mount | Surface Mount |
| Operating Temperature Grade | Commercial (C) | — |
| Speed Grade | 7 | — |
| Core Voltage | 1.8 V | — |
| I/O Bank Voltage (VCCIO) | 1.5V / 1.8V / 2.5V / 3.3V (bank-dependent) | — |
| Configuration Interface | JTAG, Passive Serial | — |
| メモリタイプ | Embedded SRAM blocks (ESBs) | — |
| PLL / Clock Management | Yes, dedicated PLL blocks | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| System Gates | — | 600,000 |
| Logic Elements / Cells | — | 24,320 |
| Maximum Operating Frequency | — | 301.21 MHz |
| Propagation Delay (tpd) | — | 1.78 ns (CMOS) |
| Process Technology | — | 0.15 µm CMOS |
| Core Supply Voltage (VCCINT) | — | 1.8 V nominal (1.71 V to 1.89 V) |
| 動作温度 | — | -40 °C to +85 °C (Industrial) |
| パッケージ | — | 652-ball FineLine BGA (S-PBGA-B652) |
| Package Code | — | BGA, square |
| Ball Pitch | — | 1.27 mm |
| Package Body Size | — | 45 mm × 45 mm |
| User I/O Lines | — | 488 |
| Dedicated Clock Inputs | — | 4 |
| Programming Interface | — | IEEE 1149.1 JTAG (in-system) |