EP2A70B652C7 vs EP20K600CB652I8 对比
详细并排对比 EP2A70B652C7 出自 Intel 和 EP20K600CB652I8 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2A70B652C7 | EP20K600CB652I8 |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $10.51 | $92.00 |
| Manufacturer | Intel (formerly Altera) | — |
| Series | APEX II | EP20K600 |
| Family | APEX II (Field-Programmable Gate Array) | APEX 20KC |
| Logic Elements (LEs) | 67200 | — |
| Typical Gates | 1140000 | — |
| Maximum User I/Os | 336 | — |
| Package Type | BGA-652 (FineLine BGA) | — |
| Package Size | 27 mm x 27 mm (approximate) | — |
| 安装类型 | Surface Mount | Surface Mount |
| Operating Temperature Grade | Commercial (C) | — |
| Speed Grade | 7 | — |
| Core Voltage | 1.8 V | — |
| I/O Bank Voltage (VCCIO) | 1.5V / 1.8V / 2.5V / 3.3V (bank-dependent) | — |
| Configuration Interface | JTAG, Passive Serial | — |
| 存储器类型 | Embedded SRAM blocks (ESBs) | — |
| PLL / Clock Management | Yes, dedicated PLL blocks | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| System Gates | — | 600,000 |
| Logic Elements / Cells | — | 24,320 |
| Maximum Operating Frequency | — | 301.21 MHz |
| Propagation Delay (tpd) | — | 1.78 ns (CMOS) |
| Process Technology | — | 0.15 µm CMOS |
| Core Supply Voltage (VCCINT) | — | 1.8 V nominal (1.71 V to 1.89 V) |
| 工作温度 | — | -40 °C to +85 °C (Industrial) |
| 封装 | — | 652-ball FineLine BGA (S-PBGA-B652) |
| Package Code | — | BGA, square |
| Ball Pitch | — | 1.27 mm |
| Package Body Size | — | 45 mm × 45 mm |
| User I/O Lines | — | 488 |
| Dedicated Clock Inputs | — | 4 |
| Programming Interface | — | IEEE 1149.1 JTAG (in-system) |