EP2A70B724C8N vs EP2A70B724I-8 Comparaison
Comparaison détaillée côte à côte de EP2A70B724C8N par Altera et EP2A70B724I-8 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP2A70B724C8N - APEX II FPGA, 3M Gates, 724-FCBGA | Altera / Intel
EP2A70B724C8N ⚠ Dernier achat
Comparaison des spécifications
| Paramètre | EP2A70B724C8N | EP2A70B724I-8 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $240,00 | $119,00 |
| Series | APEX II (EP2A70) | — |
| Family | FPGA (PLD) | APEX II |
| System Gates | 3,000,000 (3 M) | 3,000,000 |
| Logic Elements / Cells | 67,200 | 67,200 cells |
| Macrocells | 16 | — |
| Product Terms | 32 | — |
| Propagation Delay | 2.49 ns | — |
| Maximum Internal Clock Frequency | 281 MHz | — |
| Maximum Clock Frequency (fMAX) | 1694.91 MHz | — |
| Process Technology | 0.15 um CMOS, SRAM-based | 0.15 µm CMOS |
| Core Supply Voltage | 1.5 V | 1.5 V |
| Architecture | PLA-type / LUT-based | — |
| Package Type | FCBGA-724 (square) | FCBGA (Flip-Chip Ball Grid Array) |
| Number of Pins / Balls | 724 | — |
| Terminal Pitch | 1.270 mm | — |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Maximum User I/O | 536 | — |
| Maximum Internal Frequency | — | 281 MHz |
| I/O Supply Voltage | — | 3.3 V |
| Nombre de broches | — | 724 |
| Température de fonctionnement | — | -40 °C to +100 °C (Industrial) |
| Peak Reflow Temperature | — | 220 °C (per JEDEC J-STD-020) |
| User I/O Banks | — | [DATA_NEEDED: user I/O bank count] |
| User I/O Pins | — | [DATA_NEEDED: user I/O pin count] |
| Embedded System Blocks (ESBs) | — | [DATA_NEEDED: ESB count] |
| Embedded Array Blocks (EABs) | — | [DATA_NEEDED: EAB count] |
| Embedded RAM | — | [DATA_NEEDED: total bits] |
| PLLs | — | [DATA_NEEDED: PLL count] |
| Configuration Method | — | JTAG / Passive Serial / Passive Parallel |
| Niveau MSL | — | [DATA_NEEDED: MSL level] |
| Statut RoHS | — | [DATA_NEEDED: RoHS compliance] |