EP2A70B724C8N vs EP2A70B724I-8 比較
詳細な並列比較: EP2A70B724C8N メーカー: Altera および EP2A70B724I-8 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2A70B724C8N | EP2A70B724I-8 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $240.00 | $119.00 |
| Series | APEX II (EP2A70) | — |
| Family | FPGA (PLD) | APEX II |
| System Gates | 3,000,000 (3 M) | 3,000,000 |
| Logic Elements / Cells | 67,200 | 67,200 cells |
| Macrocells | 16 | — |
| Product Terms | 32 | — |
| Propagation Delay | 2.49 ns | — |
| Maximum Internal Clock Frequency | 281 MHz | — |
| Maximum Clock Frequency (fMAX) | 1694.91 MHz | — |
| Process Technology | 0.15 um CMOS, SRAM-based | 0.15 µm CMOS |
| Core Supply Voltage | 1.5 V | 1.5 V |
| Architecture | PLA-type / LUT-based | — |
| Package Type | FCBGA-724 (square) | FCBGA (Flip-Chip Ball Grid Array) |
| Number of Pins / Balls | 724 | — |
| Terminal Pitch | 1.270 mm | — |
| 実装タイプ | Surface Mount (BGA) | Surface Mount |
| Maximum User I/O | 536 | — |
| Maximum Internal Frequency | — | 281 MHz |
| I/O Supply Voltage | — | 3.3 V |
| ピン数 | — | 724 |
| 動作温度 | — | -40 °C to +100 °C (Industrial) |
| Peak Reflow Temperature | — | 220 °C (per JEDEC J-STD-020) |
| User I/O Banks | — | [DATA_NEEDED: user I/O bank count] |
| User I/O Pins | — | [DATA_NEEDED: user I/O pin count] |
| Embedded System Blocks (ESBs) | — | [DATA_NEEDED: ESB count] |
| Embedded Array Blocks (EABs) | — | [DATA_NEEDED: EAB count] |
| Embedded RAM | — | [DATA_NEEDED: total bits] |
| PLLs | — | [DATA_NEEDED: PLL count] |
| Configuration Method | — | JTAG / Passive Serial / Passive Parallel |
| MSLレベル | — | [DATA_NEEDED: MSL level] |
| RoHS ステータス | — | [DATA_NEEDED: RoHS compliance] |