EP2S90F1020I4N vs EP2S90F1020C3N Comparaison
Comparaison détaillée côte à côte de EP2S90F1020I4N par Intel et EP2S90F1020C3N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP2S90F1020C3N - 90nm Stratix II FPGA 90,960 LEs FC-FBGA-1020 | Altera
EP2S90F1020C3N ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP2S90F1020I4N | EP2S90F1020C3N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1 995,00 | $1 995,00 |
| Family | Stratix II | Stratix II (EP2S90) |
| Logic Elements | 90,960 | 90,960 |
| Logic Array Blocks (LABs) | 4548 | — |
| Embedded Memory Bits | 4,520,488 | — |
| User I/Os | 758 | — |
| Boîtier | 1020-ball FineLine BGA | — |
| Core Voltage | 1.2 V | — |
| Température de fonctionnement | -40C to +100C (Industrial) | 0C to +85C (commercial grade) |
| Process Technology | 90 nm | 90 nm CMOS |
| Embedded DSP Blocks | Yes (DSP blocks) | — |
| User I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Configuration Method | Serial/Parallel via EPCS or JTAG | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | Compliant |
| Niveau MSL | [DATA_NEEDED: MSL rating] | 3 (per JEDEC J-STD-020) |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Logic Architecture | ALM (Adaptive Logic Module) | — |
| Series | — | Stratix II |
| LABs (Logic Array Blocks) | — | 4,548 |
| Total RAM Bits | — | 4,520,488 |
| User I/O Count | — | 758 |
| Supply Voltage - Core | — | 1.15 V to 1.25 V (1.2 V nominal) |
| Speed Grade | — | C3 (commercial, slowest) |
| Boîtier / Format | — | 1020-BBGA, FC-FBGA |
| Supplier Device Package | — | 1020-FBGA (33 x 33 mm) |
| DSP Block Count | — | [DATA_NEEDED: 18x18 multiplier count] |
| Embedded Transceivers | — | [DATA_NEEDED: number of high-speed transceivers] |
| Maximum User I/O Frequency | — | [DATA_NEEDED: LVDS / DDR max rate] |
| Programming Tool | — | Altera Quartus II |