EP2SGX130GF40C3NES vs EP2SGX130GF40C4NES Comparaison
Comparaison détaillée côte à côte de EP2SGX130GF40C3NES par Altera et EP2SGX130GF40C4NES par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP2SGX130GF40C3NES - Stratix II GX FPGA, 132K LE, 6.375Gbps | Altera
EP2SGX130GF40C3NES ObsoleteIntel
EP2SGX130GF40C4NES - 132K LE Stratix II GX FPGA, 6.375Gbps SERDES, 1508-FBGA | Intel
EP2SGX130GF40C4NES ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP2SGX130GF40C3NES | EP2SGX130GF40C4NES |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $124,00 | $1 380,00 |
| Family | Stratix II GX | Stratix II GX |
| Logic Elements | 132540 | 132,540 |
| Logic Array Blocks (LABs) | 7047 | — |
| Maximum Internal Frequency | 778.82 MHz | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Voltage | 1.2 V | 1.2 V |
| Transceiver Channels | 4 to 20 (per device family configuration) | Up to 20 (4 to 20, device-dependent) |
| Maximum Transceiver Data Rate | 6.375 Gbps | 6.375 Gbps |
| Transceiver Feature | Embedded SERDES with Clock/Data Recovery (CRU) | — |
| Type de mémoire | TriMatrix embedded memory (distributed RAM, block RAM, shift register) | — |
| Boîtier | 1508-ball FC-FBGA (40 x 40 mm, 1 mm pitch) | — |
| Operating Temperature Grade | Commercial Extended | — |
| Terminal Form | Ball (BGA) | — |
| Type de montage | Surface Mount | Surface Mount (flip-chip BGA) |
| Statut RoHS | Lead-free compliant (per package code MS-034AAU-1) | — |
| Series | EP2SGX130 | — |
| Logic Blocks / ALMs | — | Approximately 53,000 ALMs |
| User I/O Pins | — | 734 |
| Total Package Pins | — | 1508 (FC-FBGA ball grid) |
| Package Code | — | GF40 (FC-FBGA, 40x40 mm, 1.0 mm pitch) |
| Speed Grade | — | C4 (speed grade -4) |
| Internal Operating Frequency | — | Up to 717 MHz |
| Embedded Memory | — | Approximately 4.5 Mbits (TriMatrix) |
| PLL Blocks | — | 8 |
| DSP Blocks | — | Yes (variable, see datasheet) |
| Lead-Free / RoHS | — | Yes (LEAD FREE per datasheet family code) |
| Niveau MSL | — | Per JEDEC J-STD-020, typically MSL-4 or higher [DATA_NEEDED: exact MSL level] |
| Température de fonctionnement | — | Commercial Extended (per N suffix) |
| JEDEC Standard Reference | — | MS-034AAU-1 |