EP3SL340H1152C2N vs EP3SL340H1152C4L Comparaison
Comparaison détaillée côte à côte de EP3SL340H1152C2N par Intel et EP3SL340H1152C4L par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP3SL340H1152C2N - Stratix III L FPGA, 337.5K LE, 1152-BGA | Intel
EP3SL340H1152C2N ⚠ Dernier achat
Comparaison des spécifications
| Paramètre | EP3SL340H1152C2N | EP3SL340H1152C4L |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $3 400,00 | $3 500,00 |
| Family | Stratix III L | — |
| Logic Elements | 337,500 | 337,500 |
| Embedded Memory Bits | 18,822,144 | 18,822,144 |
| DSP Blocks (18x18 multipliers) | 744 | — |
| Process Technology | 65 nm CMOS | 65 nm |
| Core Voltage | 0.9 V | — |
| Auxiliary / I/O Supply | 1.1 V | — |
| Maximum Fabric Frequency | 600 MHz | — |
| Boîtier | 1152-Ball FC-HFBGA (flip-chip) | 1152-BBGA, FCBGA (HBGA) |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Lead-Free / RoHS | Lead-free (per distributor listing) | — |
| Operating Temperature Grade | Commercial | — |
| Speed Grade | C2 (moderate) | C4L (L-suffix low power) |
| JTAG Support | IEEE Std 1149.1 Boundary-Scan | — |
| Type de mémoire | TriMatrix (MLAB + M9K + M144K) | — |
| Series | — | Stratix III L |
| Maximum User I/O | — | 744 |
| Logic Array Blocks (LABs) | — | [DATA_NEEDED: LAB count] |
| Embedded 18x18 Multipliers | — | 384 (per family datasheet) |
| Core Voltage (VCCINT) | — | 1.1 V |
| Température de fonctionnement | — | 0 C to +85 C (commercial) |
| Niveau MSL | — | [DATA_NEEDED: MSL rating] |
| Statut RoHS | — | [DATA_NEEDED: RoHS compliance] |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead-free status] |
| Configuration Memory | — | SRAM-based, volatile (needs external config device) |
| Maximum Operating Frequency | — | [DATA_NEEDED: per design, ~450 MHz logic per GlobalSpec listing] |
| I/O Standards Supported | — | LVDS, LVTTL, LVCMOS, SSTL, HSTL (per family) |