EP3SL50F780C4N vs EP3SL50F780C2 Comparaison
Comparaison détaillée côte à côte de EP3SL50F780C4N par Intel et EP3SL50F780C2 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP3SL50F780C4N | EP3SL50F780C2 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $162,00 | $199,95 |
| Family | Stratix III L | Stratix III L |
| Series | EP3SL50 | — |
| Logic Elements (LEs) | 47,500 | — |
| Number of LABs / CLBs | 1,900 | — |
| Total RAM Bits | 2,184,192 (273 KB) | — |
| Number of User I/Os | 488 | — |
| Number of GPIO | 488 | — |
| Boîtier | 780-BBGA, FCBGA (FBGA-780) | 780-ball FCBGA (Flip-Chip BGA) |
| Process Technology | 65 nm CMOS | 65 nm |
| Speed Grade | -4 | — |
| Température de fonctionnement | 0C to +85C (commercial) | 0°C to +85°C (commercial) |
| Core Voltage Range | 0.86 V to 1.15 V | — |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Lead Free / RoHS | Lead free, RoHS compliant per distributor listing | — |
| Maximum Operating Frequency | 717 MHz (per family) | — |
| DSP Blocks | Hard DSP blocks (Stratix III family) | — |
| Memory Interface Support | DDR, DDR2, DDR3 (family feature) | — |
| Logic Elements (LE) | — | 47,500 |
| Logic Array Blocks (LABs) | — | 1,900 |
| Embedded Memory (bits) | — | 2,184,192 |
| Maximum User I/Os | — | 488 |
| Core Voltage | — | 1.1 V |
| Maximum Core Frequency | — | 600 MHz |
| Configuration Interface | — | JTAG / passive serial / fast passive parallel |
| I/O Standards | — | LVDS, LVCMOS, SSTL, HSTL, DDR2/DDR3 memory interfaces |
| Embedded Memory Type | — | TriMatrix (MLAB, M9K, M144K blocks) |
| Statut RoHS | — | Compliant |