EP910PC-25 vs EP910PC30T Comparaison
Comparaison détaillée côte à côte de EP910PC-25 par Altera et EP910PC30T par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP910PC-25 | EP910PC30T |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $16,92 | $8,85 |
| Product Family | Classic EPLD | — |
| Usable Gates | 900 | — |
| Integration Gates (typical) | 4800 | — |
| Macrocells | 24 | — |
| Pin-to-Pin Delay (tPD) | 25 ns | — |
| Maximum Operating Frequency (fMAX) | 33.3 MHz | — |
| Supply Voltage (VCC) | 5 V +/- 10% | 5 V (4.75 V to 5.25 V) |
| Technology | CMOS EPROM | — |
| Boîtier | PDIP-24 (Plastic DIP) | 24-pin PDIP (PC) |
| Nombre de broches | 24 | 24 |
| Dedicated Inputs | 10 | — |
| Dedicated I/O Pins | 12 | — |
| TTL Compatibility | 100% TTL emulation | — |
| Température de fonctionnement | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| Erasure Method | Not erasable in plastic package (windowless) | — |
| Family | — | Altera Classic EPLD |
| Device Series | — | EP910 |
| Number of Macrocells | — | 24 |
| Number of I/O Pins | — | 24 |
| Number of Dedicated Inputs | — | 12 |
| Maximum Product Terms | — | 240 |
| Propagation Delay (tPD) | — | 30 ns |
| Maximum Clock Frequency (fMAX) | — | 33.3 MHz |
| Process Technology | — | CMOS |
| Programmable Logic Architecture | — | PAL-type sum-of-products, EPLD |
| Type de montage | — | Through-Hole (THT) |
| Speed Grade | — | -30 (30 ns tPD) |
| Programming Technology | — | EPROM (OTP in plastic package, UV-erasable in windowed package) |
| Statut RoHS | — | [DATA_NEEDED: RoHS compliance status] |