EPC1LC20-WCEC52 vs EPC1L20 Comparaison
Comparaison détaillée côte à côte de EPC1LC20-WCEC52 par Altera et EPC1L20 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC1LC20-WCEC52 | EPC1L20 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | Obsolete | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $7,45 | $3,75 |
| Type de mémoire | OTP Configuration PROM (Anti-fuse) | OTP Configuration PROM (Flash) |
| Taille de mémoire | 1 Mbit (1,048,576 bits) | 1 Mbit |
| Organisation de la mémoire | 212,942 x 1 bit | — |
| Interface | Serial (Altera FPP/PS configuration protocol) | Serial / FPP configuration + JTAG (IEEE 1149.1) |
| Configuration Clock (DCLK) | 8 MHz maximum | — |
| Supply Voltage (VCC) | 3.3 V | — |
| I/O Voltage Tolerance | 5.0 V (FPGA interface) | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Programmability | One-Time Programmable (OTP) | One-Time Programmable (OTP) |
| Température de fonctionnement | -40C to +85C (industrial) | [DATA_NEEDED: operating temperature range] |
| Boîtier | 20-pin PLCC (J-lead, through-hole, 9x9 mm) | 20-pin PLCC (9x9 mm) |
| Package Mounting | Through-hole (also accepts PLCC socket) | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| Compatible FPGA Families | Cyclone, Stratix, APEX, ACEX, MAX series | — |
| Programming Interface | JTAG (IEEE Std 1149.1) ISP | — |
| Nombre de broches | 20 | — |
| Statut du cycle de vie | Obsolete (recommended replacement: EPCQ family or newer serial config devices) | — |
| Configuration Clock (max) | — | 8 MHz |
| Flash Access Time | — | 90 ns (approx.) |
| Max Read Bandwidth | — | 160 Mbps (16-bit DQ bus) |
| Tension d'alimentation | — | 3.3 V (typical) |
| Type de montage | — | Through-Hole / Socket |
| JTAG / ISP Support | — | Yes (IEEE 1149.1) |
| Compatible FPGA Series | — | Stratix, Cyclone, APEX, FLEX, ACEX, LUT-based families |