EPC2LC20-U vs EPC2LI20 Comparaison
Comparaison détaillée côte à côte de EPC2LC20-U par Altera et EPC2LI20 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC2LC20-U | EPC2LI20 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,60 | $5,95 |
| Type de mémoire | Configuration PROM (Flash, in-system programmable) | Flash (in-system programmable) |
| Taille de mémoire | 1.6 Mbit | 1.6 Mb (1,572,864 bits) |
| Interface | Serial (4-wire Altera configuration) + JTAG (IEEE 1149.1) | — |
| Max Configuration Clock | 10 MHz | — |
| Supply Voltage (VCC) | 3.3 V (3.0 V to 3.6 V) | — |
| Programmable | In-system via JTAG | — |
| Cascade Support | Yes (multi-PROM for larger bitstreams) | — |
| Boîtier | 20-PLCC (9x9) | — |
| Type de montage | Surface Mount | Surface Mount (PLCC socket-compatible) |
| Température de fonctionnement | [DATA_NEEDED: full operating temperature range] | -40 C to +85 C (Industrial) |
| Supported FPGA Families | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K | — |
| JTAG Support | Yes (IEEE 1149.1 boundary-scan) | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Niveau MSL | [DATA_NEEDED: moisture sensitivity level] | [DATA_NEEDED: MSL level] |
| Programmable Type | — | In System Programmable (ISP) |
| Fonction | — | Configuration PROM for SRAM-based FPGAs |
| Supply Voltage - Operating | — | 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing) |
| Boîtier / Format | — | 20-PLCC (J-lead, 9x9 mm) |
| Configuration Interface | — | Serial or Byte-wide (parallel) |
| Decompression | — | On-chip (supports compressed bitstreams) |
| JTAG / ISP Interface | — | IEEE 1532 (TCK, TMS, TDI, TDO) |
| Multi-Device Support | — | Yes (daisy-chain configuration) |
| User-Accessible Memory | — | Yes (unused flash available to user logic) |