EPC2LC20-U vs EPC2LI20 对比

详细并排对比 EPC2LC20-U 出自 Altera 和 EPC2LI20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC2LC20-U EPC2LI20
品牌 Altera Altera
分类 Memory ICs Memory ICs
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $9.60 $5.95
存储器类型 Configuration PROM (Flash, in-system programmable) Flash (in-system programmable)
存储容量 1.6 Mbit 1.6 Mb (1,572,864 bits)
接口 Serial (4-wire Altera configuration) + JTAG (IEEE 1149.1) —
Max Configuration Clock 10 MHz —
Supply Voltage (VCC) 3.3 V (3.0 V to 3.6 V) —
Programmable In-system via JTAG —
Cascade Support Yes (multi-PROM for larger bitstreams) —
封装 20-PLCC (9x9) —
安装类型 Surface Mount Surface Mount (PLCC socket-compatible)
工作温度 [DATA_NEEDED: full operating temperature range] -40 C to +85 C (Industrial)
Supported FPGA Families ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K —
JTAG Support Yes (IEEE 1149.1 boundary-scan) —
RoHS 状态 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Lead-Free [DATA_NEEDED: lead-free status] —
MSL 等级 [DATA_NEEDED: moisture sensitivity level] [DATA_NEEDED: MSL level]
Programmable Type — In System Programmable (ISP)
功能 — Configuration PROM for SRAM-based FPGAs
Supply Voltage - Operating — 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing)
封装 / 外壳 — 20-PLCC (J-lead, 9x9 mm)
Configuration Interface — Serial or Byte-wide (parallel)
Decompression — On-chip (supports compressed bitstreams)
JTAG / ISP Interface — IEEE 1532 (TCK, TMS, TDI, TDO)
Multi-Device Support — Yes (daisy-chain configuration)
User-Accessible Memory — Yes (unused flash available to user logic)

数据手册与资源

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