EPF10K200SBC600-1 vs EPF10K250EBC600-3 Comparaison
Comparaison détaillée côte à côte de EPF10K200SBC600-1 par Intel et EPF10K250EBC600-3 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EPF10K200SBC600-1 - 200K Gate FLEX-10KS FPGA, 470 I/O | Intel / Altera
EPF10K200SBC600-1 Obsolete
Comparaison des spécifications
| Paramètre | EPF10K200SBC600-1 | EPF10K250EBC600-3 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $425,00 | $205,00 |
| Family | FLEX-10KS | FLEX 10KE |
| Series | EPF10K200 | — |
| Logic Elements / Cells | 9,984 | — |
| Gate Count (typical) | 200,000 gates | — |
| Logic Array Blocks (LABs) | 1,248 | — |
| Number of User I/Os | 470 | — |
| Number of Logic Cells | 4,992 | — |
| Embedded RAM (bits) | 24,576 (across EABs) | — |
| Max Internal Frequency | 250 MHz | — |
| Propagation Delay | 0.4 ns | — |
| Process Technology | 0.22 µm CMOS | SRAM-based CMOS |
| Core Supply Voltage (VCCINT) | 2.375 V to 2.625 V (typ. 2.5 V) | — |
| Speed Grade | -1 (fastest commercial) | -3 |
| Température de fonctionnement | 0 °C to 70 °C (Commercial) | [DATA_NEEDED: operating temperature range] |
| Boîtier | 600-ball BGA, 45 × 45 mm, 1.27 mm pitch | 600-ball FineLine BGA |
| Type de montage | Surface Mount | — |
| JTAG Support | IEEE Std 1149.1 | — |
| Configuration | Serial via EPC2/EPC8 configuration devices | — |
| Statut RoHS | Non-compliant (per third-party listing) | — |
| Logic Elements | — | 12,160 LEs |
| Typical Gates | — | 250,000 |
| Maximum User I/O | — | 470 |
| Embedded Array Blocks (EABs) | — | 12 (each 2 Kbits) |
| Total Embedded Memory | — | 24 Kbits (RAM) |
| PLLs (Phase-Locked Loops) | — | 4 |
| Dedicated Clock Inputs | — | 6 |
| Core Supply Voltage | — | 3.3 V |
| I/O Supply Voltage | — | 3.3 V (5 V tolerant) |
| Configuration Mode | — | Passive Serial / Passive Parallel / JTAG |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |