EPF10K250EFC672-3 vs EPF10K250EFI672-3 Comparaison
Comparaison détaillée côte à côte de EPF10K250EFC672-3 par Intel et EPF10K250EFI672-3 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPF10K250EFC672-3 | EPF10K250EFI672-3 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $99,50 | $125,00 |
| Product Type | FPGA (Field Programmable Gate Array) | — |
| Family | FLEX 10KE | FLEX 10KE |
| Maximum Typical Gates | 250,000 | — |
| Logic Elements (LEs) | 12,160 | — |
| Embedded Memory (EAB) | 655,360 bits (80 EABs x 2,048 bits each) | — |
| Logic Array Blocks (LABs) | 392 (8 LEs per LAB) | — |
| User I/O Pins | 470 | 470 |
| Core Supply Voltage | 2.5 V | 2.5 V |
| I/O Supply Voltage | MultiVolt: 1.5 V / 1.8 V / 2.5 V / 3.3 V | 2.5 V / 3.3 V (multiVolt I/O) |
| Speed Grade | -3 (fastest) | — |
| Temperature Grade | Commercial (0C to +70C) | — |
| Boîtier | 672-ball FineLine BGA (FC) | 672-ball FineLine BGA, 1.27 mm pitch |
| Ball Pitch | 1.0 mm | — |
| Configuration Mode | JTAG (IEEE 1149.1) ISP / serial / parallel, external EPCx PROM | — |
| Process Technology | 0.25 um CMOS, 5-layer metal | CMOS, SRAM-based configuration |
| Type de montage | Surface Mount | — |
| Statut RoHS | [DATA_NEEDED: RoHS status - 672-FBGA part is non-RoHS per Fly-Wing listing] | Unknown (legacy Altera non-RoHS device) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Typical Gates | — | 250,000 |
| Logic Elements | — | [DATA_NEEDED: exact LE count] |
| Embedded Array Blocks (EABs) | — | 12 |
| EAB Dual-Port Width | — | Up to 16-bit |
| Maximum EAB Memory | — | [DATA_NEEDED: bits per EAB] |
| Propagation Delay (tpd) | — | 0.4 ns (typical, -3 speed grade) |
| Configuration Interface | — | JTAG / ByteBlaster (EPC2/EPC8 PROM) |
| Température de fonctionnement | — | 0 °C to 70 °C (commercial) |
| Design Entry | — | EDIF 2 0 0 / 3 0 0, LPM, VHDL, Verilog |