EPM5032DC20 vs EPM5032DM883B Comparaison
Comparaison détaillée côte à côte de EPM5032DC20 par Altera et EPM5032DM883B par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5032DC20 | EPM5032DM883B |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $8,20 | $64,50 |
| Device Family | MAX 5000 | — |
| Product Type | UV-erasable PLD (CPLD class) | — |
| Macrocells | 32 | 32 |
| Usable Gates | 600 | — |
| Propagation Delay (tPD) | 20 ns | [DATA_NEEDED: tPD in ns] |
| Maximum Frequency (Fmax) | 71.4 MHz | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 5 V (nominal, TTL-compatible I/O) |
| Dedicated Inputs | 7 | — |
| I/O Pins | 16 (bidirectional) | — |
| Total Inputs (max) | 24 | — |
| Output Macrocells | 16 | — |
| Clock Inputs | 1 (global) | — |
| Architecture | PAL-type with Programmable Interconnect Array (PIA) | — |
| Process Technology | CMOS | — |
| Boîtier | 20-pin Ceramic DIP (DC) with UV window | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | MILITARY (per /883B screen) |
| Type de montage | Through-Hole (DIP) | Through-Hole |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: lead-bearing ceramic; likely non-compliant] |
| Family | — | MAX 5000 (Classic EPLD) |
| Logic Elements | — | 32 macrocells (MAX architecture) |
| Technology | — | UV-erasable EPROM cell |
| Maximum Counter Frequency (fCNT) | — | [DATA_NEEDED: fCNT in MHz] |
| MIL-STD-883 Screening | — | Class B (DM/883B) |
| Package Type | — | WDIP-28 (ceramic DIP with quartz window) |
| Nombre de broches | — | 28 |
| Terminal Form | — | Through-Hole |
| Package Shape | — | RECTANGULAR |
| Programming Method | — | Programmer + UV erase |