EPM5032DC20 vs EPM5032DM883B 对比

详细并排对比 EPM5032DC20 出自 Altera 和 EPM5032DM883B 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5032DC20 EPM5032DM883B
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $8.20 $64.50
Device Family MAX 5000 —
Product Type UV-erasable PLD (CPLD class) —
Macrocells 32 32
Usable Gates 600 —
Propagation Delay (tPD) 20 ns [DATA_NEEDED: tPD in ns]
Maximum Frequency (Fmax) 71.4 MHz —
Supply Voltage (VCC) 5 V (4.75 V to 5.25 V) 5 V (nominal, TTL-compatible I/O)
Dedicated Inputs 7 —
I/O Pins 16 (bidirectional) —
Total Inputs (max) 24 —
Output Macrocells 16 —
Clock Inputs 1 (global) —
Architecture PAL-type with Programmable Interconnect Array (PIA) —
Process Technology CMOS —
封装 20-pin Ceramic DIP (DC) with UV window —
工作温度 [DATA_NEEDED: operating temperature range] MILITARY (per /883B screen)
安装类型 Through-Hole (DIP) Through-Hole
RoHS 状态 [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: lead-bearing ceramic; likely non-compliant]
Family — MAX 5000 (Classic EPLD)
Logic Elements — 32 macrocells (MAX architecture)
Technology — UV-erasable EPROM cell
Maximum Counter Frequency (fCNT) — [DATA_NEEDED: fCNT in MHz]
MIL-STD-883 Screening — Class B (DM/883B)
Package Type — WDIP-28 (ceramic DIP with quartz window)
引脚数量 — 28
Terminal Form — Through-Hole
Package Shape — RECTANGULAR
Programming Method — Programmer + UV erase

数据手册与资源

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