EPM5032DC20 vs EPM5032DM883B 比較
詳細な並列比較: EPM5032DC20 メーカー: Altera および EPM5032DM883B メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5032DC20 | EPM5032DM883B |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $8.20 | $64.50 |
| Device Family | MAX 5000 | — |
| Product Type | UV-erasable PLD (CPLD class) | — |
| Macrocells | 32 | 32 |
| Usable Gates | 600 | — |
| Propagation Delay (tPD) | 20 ns | [DATA_NEEDED: tPD in ns] |
| Maximum Frequency (Fmax) | 71.4 MHz | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 5 V (nominal, TTL-compatible I/O) |
| Dedicated Inputs | 7 | — |
| I/O Pins | 16 (bidirectional) | — |
| Total Inputs (max) | 24 | — |
| Output Macrocells | 16 | — |
| Clock Inputs | 1 (global) | — |
| Architecture | PAL-type with Programmable Interconnect Array (PIA) | — |
| Process Technology | CMOS | — |
| パッケージ | 20-pin Ceramic DIP (DC) with UV window | — |
| 動作温度 | [DATA_NEEDED: operating temperature range] | MILITARY (per /883B screen) |
| 実装タイプ | Through-Hole (DIP) | Through-Hole |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: lead-bearing ceramic; likely non-compliant] |
| Family | — | MAX 5000 (Classic EPLD) |
| Logic Elements | — | 32 macrocells (MAX architecture) |
| Technology | — | UV-erasable EPROM cell |
| Maximum Counter Frequency (fCNT) | — | [DATA_NEEDED: fCNT in MHz] |
| MIL-STD-883 Screening | — | Class B (DM/883B) |
| Package Type | — | WDIP-28 (ceramic DIP with quartz window) |
| ピン数 | — | 28 |
| Terminal Form | — | Through-Hole |
| Package Shape | — | RECTANGULAR |
| Programming Method | — | Programmer + UV erase |