EPM5032DI-20 vs EPM5032DI-25 Comparaison
Comparaison détaillée côte à côte de EPM5032DI-20 par Intel et EPM5032DI-25 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5032DI-20 | EPM5032DI-25 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $8,75 | $18,20 |
| Family | MAX 5000 (Altera legacy EPLD) | MAX 5000 |
| Architecture | CMOS PAL-type EPLD with PIA | PAL-type, CMOS, AND-OR sum-of-products |
| Macrocells | 32 | 32 |
| Dedicated Inputs | 7 | 7 |
| Bidirectional I/O Pins | 16 | 16 |
| Product Terms | 320 (maximum) | 320 |
| Flip-Flops | 16 (one per macrocell) | — |
| Fréquence d'horloge maximale | 62.5 MHz | — |
| Pin-to-Pin Delay | 20 ns (speed grade -20) | — |
| Boîtier | Ceramic DIP-20 (windowed, UV-erasable) | Ceramic DIP, windowed (UV-erasable) |
| Température de fonctionnement | Industrial (per 'I' suffix) | 0C to +70C (commercial) |
| Programming | UV-erasable CMOS, JEDEC fuse file | — |
| Development Tool | Altera MAX+PLUS II (legacy) | MAX+PLUS II / A+PLUS |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status for ceramic DIP variant] | [DATA_NEEDED: likely non-compliant due to ceramic DIP] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Device Type | — | UV-erasable Programmable Logic Device (PLD) |
| Logic Gates | — | [DATA_NEEDED: equivalent gate count] |
| Total Array Inputs | — | 24 |
| Registered Outputs | — | 16 |
| Global Clocks | — | 1 |
| Propagation Delay (tPD) | — | 25 ns |
| Maximum Clock Frequency (fMAX) | — | 62.5 MHz |
| Tension d'alimentation | — | 5 V |
| Process Technology | — | CMOS |
| Nombre de broches | — | [DATA_NEEDED: exact pin count - 24 or 28] |
| I/O Standard | — | TTL-compatible |
| Programmability | — | UV-erasable, EPROM-based |
| Lifecycle | — | Not Recommended for New Designs (NRND) |