EPM5064JC1 vs EPM5064JC-1 Comparaison
Comparaison détaillée côte à côte de EPM5064JC1 par Altera et EPM5064JC-1 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5064JC1 | EPM5064JC-1 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1,05 | $18,25 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD / EPLD (Erasable PLD) | EPLD (Erasable Programmable Logic Device) |
| Macrocells | 64 | — |
| Logic Array Blocks (LABs) | 4 | — |
| Usable Gates | 1.25K | 1250 (typical) |
| Maximum Operating Frequency (fCNT) | 62.5 MHz | — |
| External Clock Input (max) | 50 MHz | — |
| I/O Pins | 28 | — |
| Dedicated Inputs | 7 | [DATA_NEEDED: dedicated input count] |
| Total Inputs | 36 (28 I/O + 7 dedicated + 1 clock) | — |
| Operating Voltage (VCC) | 5 V | — |
| Program Type | EPROM (one-time programmable, UV-erasable) | — |
| Process Technology | CMOS | 0.8 µm CMOS |
| Boîtier | 44-pin PLCC (J-Lead) | 44-pin PLCC (J-lead, windowed ceramic) |
| Operating Temperature (JC suffix) | 0°C to +70°C (commercial) | — |
| Supply Current (ICC) | [DATA_NEEDED: ICC maximum] | — |
| Statut RoHS | unknown | Non-compliant (windowed ceramic, contains Pb in glass frit) |
| Lead-Free Status | unknown | — |
| Macro Cells | — | 64 |
| Logic Elements | — | 128 (Logic Array Blocks) |
| Maximum Operating Frequency | — | 33.3 MHz (fCNT) |
| Pin-to-Pin Delay (tPD) | — | [DATA_NEEDED: tPD typical/max in ns] |
| Supply Voltage (VCC) | — | 5 V nominal (4.75 V – 5.25 V) |
| Programmable Pins | — | 36 (typical I/O, 44-pin PLCC) |
| Type de montage | — | Surface Mount (PLCC socket recommended) |
| Température de fonctionnement | — | 0 °C to +70 °C (commercial, -JC suffix) |
| Erasure Method | — | UV-erasable through quartz window |
| Programming Method | — | Altera Logic Programmer + MasterBlaster/ByteBlasterMV |
| JTAG Boundary Scan | — | Not supported (classic MAX architecture) |
| Military/Avionics SMD | — | 5962-01-417-3750 (QML variant: EPM5064JM/883) |