EPM5192JI-1 vs EPM5192LI-1 Comparaison
Comparaison détaillée côte à côte de EPM5192JI-1 par Intel et EPM5192LI-1 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5192JI-1 | EPM5192LI-1 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $17,40 | $16,40 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CMOS UV-Erasable Programmable Logic Device (PLD / EPLD) | EPLD (UV-Erasable/OTP Complex PLD) |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | — |
| User I/O Pins | 64 | [DATA_NEEDED: user I/O count for JLCC variant] |
| Dedicated Inputs | 7 | — |
| Propagation Delay (tPD) | 55 ns | [DATA_NEEDED: tPD in ns at -1 grade] |
| Supply Voltage (VCC) | 4.5 V to 5.5 V (nominal 5 V) | — |
| Process Technology | CMOS EPROM | CMOS EPROM, UV-erasable |
| Boîtier | 84-pin JLCC (Windowed ceramic J-lead) | — |
| Température de fonctionnement | Industrial, -40 C to +85 C | [DATA_NEEDED: industrial vs military range] |
| Configuration Memory | UV-erasable EPROM | — |
| Programming Method | External EPROM programmer (via programming hardware) | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status of ceramic LI variant] |
| Speed Grade | -1 (slowest grade in EPM5192 family) | -1 |
| Logic Element per Macrocell | 1 D flip-flop + AND/OR array | — |
| Usable Gates | — | 3,750 |
| Maximum Toggle Frequency | — | 40 MHz |
| Tension d'alimentation | — | 5 V |
| Package Type | — | JLCC (windowed, ceramic, UV-erasable) |
| Nombre de broches | — | [DATA_NEEDED: pin count of LI package] |
| Type de montage | — | Surface Mount (JLCC with J-leads) |
| Niveau MSL | — | [DATA_NEEDED: MSL level] |
| Lead Free | — | [DATA_NEEDED: lead-free] |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA) |
| Architecture | — | EEPROM/EPROM-based, non-volatile, instant-on |