EPM5192JI-1 vs EPM5192LI-1 Comparison

Detailed side-by-side comparison of EPM5192JI-1 by Intel and EPM5192LI-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192JI-1 EPM5192LI-1
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $17.40 $16.40
Family MAX 5000 MAX 5000
Device Type CMOS UV-Erasable Programmable Logic Device (PLD / EPLD) EPLD (UV-Erasable/OTP Complex PLD)
Macrocells 192 192
Logic Array Blocks (LABs) 12 β€”
User I/O Pins 64 [DATA_NEEDED: user I/O count for JLCC variant]
Dedicated Inputs 7 β€”
Propagation Delay (tPD) 55 ns [DATA_NEEDED: tPD in ns at -1 grade]
Supply Voltage (VCC) 4.5 V to 5.5 V (nominal 5 V) β€”
Process Technology CMOS EPROM CMOS EPROM, UV-erasable
Package 84-pin JLCC (Windowed ceramic J-lead) β€”
Operating Temperature Industrial, -40 C to +85 C [DATA_NEEDED: industrial vs military range]
Configuration Memory UV-erasable EPROM β€”
Programming Method External EPROM programmer (via programming hardware) β€”
RoHS Status [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS status of ceramic LI variant]
Speed Grade -1 (slowest grade in EPM5192 family) -1
Logic Element per Macrocell 1 D flip-flop + AND/OR array β€”
Usable Gates β€” 3,750
Maximum Toggle Frequency β€” 40 MHz
Supply Voltage β€” 5 V
Package Type β€” JLCC (windowed, ceramic, UV-erasable)
Pin Count β€” [DATA_NEEDED: pin count of LI package]
Mounting Type β€” Surface Mount (JLCC with J-leads)
MSL Level β€” [DATA_NEEDED: MSL level]
Lead Free β€” [DATA_NEEDED: lead-free]
Programmable Interconnect β€” Programmable Interconnect Array (PIA)
Architecture β€” EEPROM/EPROM-based, non-volatile, instant-on

Datasheets & Resources

Browse All Products Create BOM Request Quote