EPM7160ELC84-12 vs EPM7160ELC84-20 Comparaison
Comparaison détaillée côte à côte de EPM7160ELC84-12 par Altera et EPM7160ELC84-20 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPM7160ELC84-12 - MAX 7000 CPLD, 160 Macrocells, 12ns | Altera
EPM7160ELC84-12 ⚠ Dernier achat
Comparaison des spécifications
| Paramètre | EPM7160ELC84-12 | EPM7160ELC84-20 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $11,10 | $16,95 |
| Manufacturer | Altera (Intel PSG) | — |
| Series | MAX 7000 (MAX 7000E) | — |
| Programmable Type | EE PLD (EEPROM) | — |
| Number of Macrocells | 160 | — |
| Number of Logic Array Blocks (LABs) | 4 | — |
| Number of Usable Gates | 3,200 | — |
| Number of I/O (max) | 68 | — |
| Number of I/O (per package) | 64 | — |
| Propagation Delay tpd(1) max | 12 ns | — |
| Counter Frequency (max) | 90.9 MHz | — |
| Voltage Supply - Internal | 4.75 V to 5.25 V (5 V nominal) | — |
| Température de fonctionnement | 0C to +70C (commercial) | — |
| Boîtier / Format | 84-LCC (J-Lead) | — |
| Supplier Device Package | 84-PLCC (29.31 x 29.31 mm) | — |
| Type de montage | Surface Mount | Surface Mount (PLCC socket compatible) |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance per specific part marking] |
| Family | — | MAX 7000 |
| Macrocells | — | 160 |
| Logic Array Blocks | — | 4 |
| Usable Gates | — | 3,200 |
| User I/O Pins | — | 64 |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Supply Voltage (VCC) | — | 5.0 V |
| Operating Temperature (Commercial) | — | 0C to +70C |
| Programming Interface | — | IEEE 1149.1 JTAG (ISP) |
| In-System Programmable | — | Yes (5.0-V ISP) |
| Boîtier | — | PLCC-84 (windowed ceramic carrier not applicable - plastic) |
| Technology | — | CMOS EEPROM |
| Architecture | — | Second-generation MAX |
| Global Clock Inputs | — | 4 |
| Logic Element Type | — | EEPROM-based macrocell |