EPM7192EGC160-12 vs EPM7192EQC160-20 Comparaison
Comparaison détaillée côte à côte de EPM7192EGC160-12 par Intel et EPM7192EQC160-20 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EPM7192EQC160-20 - 192-Macrocell MAX 7000 CPLD, 20ns, PQFP-160 | Intel
EPM7192EQC160-20 ObsoleteComparaison des spécifications
| Paramètre | EPM7192EGC160-12 | EPM7192EQC160-20 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $10,85 | $58,26 |
| Series | MAX 7000 | MAX 7000 |
| Device Family | MAX 7000E (EPM7192E) | — |
| Macrocells | 192 | — |
| Logic Array Blocks (LABs) | 4 | — |
| Usable Gates | 3.75K | — |
| User I/O Pins | 124 | — |
| Propagation Delay (tPD) | 12 ns | — |
| Maximum Operating Frequency | 76.9 MHz | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V (5.0 V nominal) | 4.75 V to 5.25 V |
| Process Technology | CMOS, EEPROM-based | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Boîtier | 160-BPGA / PGA-160 (39.6 x 39.6 mm) | — |
| Type de montage | Through-Hole (Pin Grid Array, socketable) | Surface Mount |
| Température de fonctionnement | 0 C to +90 C (Commercial) | -40C to +85C (industrial) |
| Statut RoHS | [DATA_NEEDED: RoHS status - not stated in provided web data] | [DATA_NEEDED: RoHS status - non-RoHS era part] |
| Programmable Type | — | EE PLD (EEPROM-based) |
| Number of Macrocells | — | 192 |
| Number of Logic Array Blocks | — | 4 |
| Number of User I/O Pins | — | 124 (per package), 36 (per data source variant description) |
| Delay Time (tPD) | — | 20 ns |
| Internal Counter Frequency (fCNT) | — | 100 MHz typical |
| Boîtier / Format | — | 160-BQFP / 160-PQFP (28x28 mm) |
| In-System Programmable (ISP) | — | Yes, 5.0 V ISP via JTAG (IEEE Std. 1149.1) |
| Programmable Security Bit | — | Yes |
| Power-Saving Mode | — | Yes, programmable per macrocell |
| Niveau MSL | — | [DATA_NEEDED: MSL rating] |