EPM9560RC240-2 vs EPM9560RC240-15N Comparaison
Comparaison détaillée côte à côte de EPM9560RC240-2 par Altera et EPM9560RC240-15N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM9560RC240-2 | EPM9560RC240-15N |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $180,00 | $27,85 |
| Family | MAX 9000 | MAX 9000 (third-generation Multiple Array MatriX) |
| Logic Elements | 560 macrocells | — |
| Usable Gates | 12,000 | 12,000 |
| Pin-to-Pin Delay | 2 ns (speed grade -2) | — |
| Maximum Frequency | 100 MHz | — |
| Tension d'alimentation | 5 V | 5.0 V |
| User I/O Count | 212 | — |
| Boîtier | 240-pin RQFP (Metric QFP) | RQFP-240 (240-pin Plastic Quad Flat Pack) |
| Type de montage | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1), in-system programmable | — |
| Non-Volatile Configuration | Yes (EEPROM-based) | — |
| Température de fonctionnement | [DATA_NEEDED: commercial/industrial grade] | 0C to +70C (Commercial) |
| Statut RoHS | Non-compliant (5V RQFP, pre-RoHS era) | [DATA_NEEDED: RoHS compliance - older Altera RQFP part] |
| Lead-Free | No (legacy Sn/Pb process) | — |
| Logic Block Count | [DATA_NEEDED: LAB count] | — |
| Series | — | MAX 9000 |
| Macrocells | — | 560 |
| Logic Array Blocks (LABs) | — | 35 |
| Maximum User I/O Pins | — | 216 |
| Pin-to-Pin Propagation Delay (tPD) | — | 15 ns |
| Internal Counter Frequency (fCNT) | — | 145 MHz |
| Global Setup Time (tFSU) | — | [DATA_NEEDED: tFSU for -15 grade] |
| Clock-to-Output Time (tFCO) | — | [DATA_NEEDED: tFCO for -15 grade] |
| Logic Family | — | CMOS (EEPROM-based) |
| Programmability | — | In-system programmable (IEEE 1532/JTAG) |
| Boundary-Scan Test | — | JTAG (IEEE 1149.1) |