IDTADC1210S065HN-C18 vs IDTADC1210S105HN-C18 Comparaison
Comparaison détaillée côte à côte de IDTADC1210S065HN-C18 par Renesas Electronics et IDTADC1210S105HN-C18 par Renesas Electronics. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Renesas Electronics
IDTADC1210S065HN-C18 - 12-bit 65 MSPS ADC | Renesas (IDT)
IDTADC1210S065HN-C18 NrndRenesas Electronics
IDTADC1210S105HN-C18 - 12-bit 105MSPS ADC, 40-VFQFPN | IDT/Renesas
IDTADC1210S105HN-C18 ✓ ActifComparaison des spécifications
| Paramètre | IDTADC1210S065HN-C18 | IDTADC1210S105HN-C18 |
|---|---|---|
| Marque | Renesas Electronics | Renesas Electronics |
| Catégorie | ADC/DAC | ADC/DAC |
| Statut du cycle de vie | NRND | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $10,05 | $21,45 |
| Résolution | 12 bit | 12 bit |
| Number of Channels | 1 | 1 |
| Fréquence d'échantillonnage | 65 MSPS | — |
| Architecture | Pipelined | Pipelined |
| Analog Supply Voltage (VDDA) | 3.0 V typical (3.9 V abs max) | 3 V (typical) |
| Digital Output Supply (VDDO) | 1.8 V to 3.3 V | — |
| Output Interface | CMOS parallel or LVDS DDR (selectable) | — |
| Input Type | Single-ended analog input (switched-capacitor) | — |
| Operating Ambient Temperature | -40C to +85C | — |
| Junction Temperature (max) | 125C | — |
| Storage Temperature | -55C to +125C | -55 C to +125 C |
| Boîtier | 40-pin HVQFN (6x6 mm) with exposed thermal pad | 40-VFQFPN Exposed Pad |
| Type de montage | Surface Mount | — |
| Control Mode | Pin-control (CS held HIGH at power-up) and SPI serial | — |
| Statut RoHS | Compliant (per Renesas/IDT product family) | Compliant (per Renesas product page) |
| Sample Rate (this grade) | — | 105 Msps |
| Maximum Sample Rate (family) | — | 125 Msps |
| Analog Input Bandwidth | — | 600 MHz |
| SNR | — | 70 dBFS |
| SFDR | — | 86 dBc |
| Output Supply Voltage (VDDO) | — | 1.8 V (typical) |
| Analog Supply Range | — | 0.4 V to 3.9 V (absolute max) |
| Power Dissipation | — | 430 mW at 80 Msps |
| Plage de tension d'entrée | — | 1 Vp-p to 2 Vp-p (flexible) |
| Digital Output Format | — | CMOS or LVDS DDR |
| Output Coding | — | Offset binary, two's complement, gray code |
| Configuration Interface | — | SPI (Serial Peripheral Interface) |
| Clock Input Division | — | Divided by 2 internally |
| Duty Cycle Stabilizer | — | Integrated |
| Out-of-Range Detection | — | Fast OTR flag |
| Operating Temperature (Tamb) | — | -40 C to +85 C |
| Maximum Junction Temperature | — | 125 C |