K6X1008C2D-BF70 vs K6X1008C2D-GF70 Comparaison
Comparaison détaillée côte à côte de K6X1008C2D-BF70 par Samsung Electronics et K6X1008C2D-GF70 par Samsung Electronics. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Samsung Electronics
K6X1008C2D-BF70 - 128Kx8 70ns Low Power CMOS SRAM | Samsung
K6X1008C2D-BF70 NrndSamsung Electronics
K6X1008C2D-GF70 - 1Mbit 70ns 32-SOP Low Power SRAM | Samsung
K6X1008C2D-GF70 ObsoleteComparaison des spécifications
| Paramètre | K6X1008C2D-BF70 | K6X1008C2D-GF70 |
|---|---|---|
| Marque | Samsung Electronics | Samsung Electronics |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1,28 | $1,30 |
| Type de mémoire | Volatile SRAM (asynchronous, static) | Asynchronous SRAM (CMOS, Low Power) |
| Memory Organization | 128K x 8 (1 Mbit total) | — |
| Number of Words | 131,072 | — |
| Bits per Word | 8 | — |
| Access Time | 70 ns | — |
| Supply Voltage (VCC) | [DATA_NEEDED: VCC range] | — |
| Type d'interface | Parallel, asynchronous | — |
| I/O Compatibility | TTL-compatible | — |
| Operating Mode | Fully static (no clock, no refresh) | — |
| Package Type | 32-SOP-525 (PDSO32) | — |
| Speed Grade Suffix | BF70 (= 70 ns) | — |
| Plage de température de fonctionnement | [DATA_NEEDED: temperature grade] | Commercial (I) / Automotive (a) - per ordering code |
| Active Supply Current (ICC) | [DATA_NEEDED: ICC max] | — |
| CMOS Standby Current (ICC2) | [DATA_NEEDED: ICC2 max] | — |
| Output Enable (OE) Pin | Yes (three-state outputs) | — |
| Write Enable (WE) Pin | Yes | — |
| Chip Enable (CE) Pin | Yes | — |
| Lead-Free Finish | Yes (per datasheet revision history) | — |
| Type de montage | Surface Mount | Surface Mount |
| Process Technology | Low-power CMOS | Samsung full CMOS (6T cell) |
| Memory Density | — | 1 Mbit (128K x 8) |
| Organisation de la mémoire | — | 128K x 8 |
| Access Time (tAA) | — | 70 ns |
| Operating Voltage (Vcc) | — | 4.5 V to 5.5 V |
| Operating Current (Icc) | — | 35 mA |
| Data Retention Voltage | — | [DATA_NEEDED: data retention voltage minimum VccDR] |
| Data Retention Current | — | [DATA_NEEDED: data retention current at 3 V / 2 V] |
| Boîtier | — | 32-SOP (PDSO32, 0.525 inch, plastic) |
| Interface | — | Parallel, asynchronous |
| Type de sortie | — | Three-state bidirectional |
| Input/Output Logic | — | TTL-compatible |
| Niveau MSL | — | [DATA_NEEDED: MSL moisture sensitivity level] |
| Statut RoHS | — | [DATA_NEEDED: RoHS compliance status from manufacturer] |
| Standby Mode | — | Chip Enable (CE) controlled |