M7AFS600-FGG484I vs AFS600-2FGG484 Comparaison
Comparaison détaillée côte à côte de M7AFS600-FGG484I par Microchip Technology et AFS600-2FGG484 par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
M7AFS600-FGG484I - Fusion FPGA 600K Gates 484-BGA | Microchip
M7AFS600-FGG484I ✓ ActifMicrochip Technology
AFS600-2FGG484 - 600K Gate Mixed-Signal FPGA | Microchip
AFS600-2FGG484 ✓ ActifComparaison des spécifications
| Paramètre | M7AFS600-FGG484I | AFS600-2FGG484 |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Programmable Logic Family | Fusion (Microsemi/Actel, now Microchip) | — |
| System Gates | 600000 gates | 600,000 gates |
| Embedded Processor | ARM CoreMP7 (ARM7TDMI-compatible) | — |
| User I/O | 172 I/O | — |
| Configuration Technology | Flash-based, on-chip | — |
| Core Supply Voltage | 1.5 V | — |
| Boîtier | 484-BGA (FGG484), 1.0 mm ball pitch | — |
| Type de montage | Surface Mount | Surface mount |
| Température de fonctionnement | -40C to +100C (industrial, I grade) | 0 °C to +85 °C |
| Memory - Listable Resource | 110592 (per DigiKey listing) | — |
| Maximum Operating Frequency | [DATA_NEEDED: maximum operating frequency] | — |
| I/O Bank Count | [DATA_NEEDED: I/O bank count] | — |
| Embedded Flash Blocks | [DATA_NEEDED: embedded flash block count] | — |
| Analog Peripherals | [DATA_NEEDED: analog peripheral configuration] | — |
| Niveau MSL | [DATA_NEEDED: moisture sensitivity level] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | — |
| Programming Tool Chain | Microchip Libero SoC (formerly Actel Libero) | — |
| Device Type | — | Fusion mixed-signal field-programmable gate array (FPGA) |
| Logic Elements | — | 110,592 logic elements |
| User I/O Count | — | 172 I/O |
| Maximum Frequency | — | 1470.59 MHz |
| Tension d'alimentation | — | 1.5 V |
| Process Technology | — | 130 nm CMOS |
| Metal Layers | — | 7 layers |
| Package Type | — | 484-pin FBGA |
| Package Body Size | — | 23 x 23 mm |
| Package Pitch | — | 1.0 mm |
| Programmable Logic | — | Flash-based programmable logic |
| Analog Capability | — | Configurable embedded analog blocks |
| Clock Management | — | Comprehensive clock generation and management circuitry |
| Configuration Memory | — | Large embedded flash-memory blocks |
| Packaging Type | — | Tray |
| RoHS Compliance | — | [DATA_NEEDED: RoHS compliance] |
| REACH Compliance | — | [DATA_NEEDED: REACH compliance] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification] |