P5020NSN1QMB557 vs P5010NSN1QMB Comparaison
Comparaison détaillée côte à côte de P5020NSN1QMB557 par NXP Semiconductors et P5010NSN1QMB par NXP Semiconductors. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
NXP Semiconductors
P5020NSN1QMB557 - QorIQ Dual-Core 1.6GHz SoC | NXP | Networking
P5020NSN1QMB557 ✓ ActifNXP Semiconductors
P5010NSN1QMB - QorIQ P5010 SoC, 64-bit Power Arch, 2.0GHz, 1295-FCBGA | NXP
P5010NSN1QMB ✓ ActifComparaison des spécifications
| Paramètre | P5020NSN1QMB557 | P5010NSN1QMB |
|---|---|---|
| Marque | NXP Semiconductors | NXP Semiconductors |
| Catégorie | Microcontrollers | Microcontrollers |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $995,00 | $318,25 |
| Part Number | P5020NSN1QMB557 | — |
| Manufacturer | NXP Semiconductors | — |
| Series | QorIQ P5 | — |
| Core Architecture | Power Architecture e5500 (64-bit) | — |
| Number of Cores | 2 | — |
| Core Frequency | 1.6 GHz (max per part decoder NSN1) | — |
| Plage de température de fonctionnement | 0 C to 105 C (extended grade) | — |
| Encryption | No encryption (NoEnc per decoder M) | Hardware-accelerated |
| DDR Memory Controller | DDR3 with ECC, 64-bit | — |
| PCIe Interface | PCIe Gen2 (per QorIQ P5020 datasheet family) | — |
| Ethernet | Gigabit Ethernet (GbE) interfaces | Dual Gigabit Ethernet |
| Serial I/O | Serial RapidIO (SRIO) | — |
| Hardware Acceleration | Pattern-match / trusted-execution engine | DPAA (Data Path Acceleration Architecture) engine |
| Boîtier | 1295-ball FCPBGA 37.5x37.5 mm | 1295-FCBGA (37.5 x 37.5 mm) |
| Type de montage | Surface Mount | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | — |
| Architecture | — | Power Architecture e5500 (64-bit) |
| Core Count | — | 1 core |
| Maximum Core Frequency | — | 2.0 GHz |
| Cache (L1 Instruction per core) | — | 32 KB |
| Cache (L1 Data per core) | — | 32 KB |
| Cache (L2 shared frontside) | — | 1 MB |
| Memory Controller | — | DDR3 with ECC support |
| PCIe | — | PCI Express Gen 2 controllers integrated |
| High-Speed Interconnect | — | Serial RapidIO (SRIO) |
| Security Engine | — | SEC crypto engine integrated |
| Température de fonctionnement | — | 0C to +105C |